FPGA-accelerated textured surface defect segmentation based on complete period Fourier reconstruction
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ORIGINAL RESEARCH PAPER
FPGA‑accelerated textured surface defect segmentation based on complete period Fourier reconstruction Yinfei Pan1 · Rongsheng Lu1 · Tengda Zhang1 Received: 24 November 2018 / Accepted: 13 November 2019 © Springer-Verlag GmbH Germany, part of Springer Nature 2019
Abstract Real-time detection of surface defects in high-generation, large-size Liquid Crystal Display (LCD) panels is a serious challenge for both image algorithms and processing speed. For the defect detection of Thin Film Transistor-Liquid Crystal Display (TFT-LCD) images, effectively processing the periodic texture composed of gate lines and data lines is a prerequisite for the success of the algorithm. The traditional one-dimensional Fourier reconstruction algorithm uses a filter-based method to remove most of the texture, but due to the spectral leakage problem, the image boundary cannot be effectively processed. The compensation based on the period extension introduces a more complex ringing effect at the image connection. Starting from the implicit periodic principle of Fourier transform, we propose a strategy of complete period truncation based on subpixel period, which completely eliminates the boundary texture. Furthermore, we fully exploit the potential of parallel execution of the algorithm, resampling the liquid crystal segments truncated in the complete period to an integer power length of 2. The FPGA structure of one-dimensional Fourier reconstruction defect segmentation algorithm with dual-task parallelism and two-pixel parallelism is designed and the calculation bandwidth of 500 MB/s can be realized at 125-MHz clock frequency. We demonstrate the superiority of the proposed method qualitatively and quantitatively. The one-dimensional Fourier reconstruction algorithm based on the complete period truncation can effectively detect various defects such as spots, scratches, fibers and dirt, and the false-positive rate of defects has been reduced by half. The resampling-based Fourier transform speeds up the computational process and the FPGA parallel acceleration architecture is three times faster than comparable server CPUs, reducing the scan detection time of the entire 8.5-generation LCD panel to 8.5 s. Keywords Complete period truncation · One-dimensional Fourier reconstruction · Resampling · FPGA acceleration · LCD defect segmentation
1 Introduction Currently, display technologies such as the Thin Film Transistor-Liquid Crystal Display (TFT-LCD), Organic Light Emitting Diode (OLED), and laser have demonstrated a trend of coexistence of various display technologies and product diversification. Although display technology is diverse, LCD still occupies the main position and has the most vitality in the market, especially in large-size display products. For defect detection in large-size/high-density LCD panels, high-resolution line scan cameras are required. * Rongsheng Lu [email protected] 1
Department of Instrument Science and Opto‑Electronics Engineering, Hefei University of Technology, No. 193 Tunxi Road, Hefe
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