Growth Mode of CeO 2 on Si Surface
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*ElectricalandComputer Engineering,North CarolinaState University, Box 7911 Raleigh North Carolina27695-7911 **MaterialsScience and Engineering,North CarolinaState University, Box 7907, Raleigh North Carolina27695-7961 ***on leavefrom NationalResearchInstitutefor Metals, Tsukuba Laboratories, 1-2-1 Sengen Tsukuba-shi ibaraki 305 JAPAN
ABSTRACT The interface structure and electrical properties of CeO21Si (I 1) grown by laser ablation in ultra high vacuum was investigated by high resolution transmission electron microscopy ,Auger electron spectroscopy and capacitance-voltage measurement. The deposited film was single crystalline CeO2, as indicated by RHEED and x-ray diffraction observations. However, during the deposition, a reaction between CeO2 and Si occurred at the interface. This reaction resulted in the formation of an oxygen deficient amorphous CeOx layer and a SiO 2 layer. Post annealing in oxygen atmosphere caused the disappearance of the amorphous CeOx and the regrowth of crystalline CeO2. The SiO2 thickness was also increased by annealing. The modified structure of CeO2/SiO2/Si showed a higher break down valtage, compared with the as-deposited sample. From these results, a combination of CeO2 and SiO2 can have a great potential for SOI structure.
INTRODUCTION
The Silicon on insulator structure (SOI) is a promising structure for high speed devices[ 11. The SOI structure requires thin epitaxial Si layer with low defect density and a buried insulator with high endurance voltage for the expected perfornances[2]. In the past, various types of SOI structures were proposed and demonstrated. They include lateral growth of amorphous Si[3l, regrowth of amorphous Si by laser annealing[4J, separation by implanted oxygen (SIMOX)[5land direct wafer bonding|6,71. However, these approaches have some difficulties, such as defect generation[8,9], control of regrowth orientation[101, and uncertainity of the thickness of the insulating layer [7]. The idea of using a crystalline insulator seems to be preferable from the view point of crystalline quality and thickness control of the epitaxial Si layer[l 1]. One approach was the combination of single crystalline spinel (MgO+A1203) on Si (100), followed by oxidation[ 12,13J. A serious problem in this method is the large lattice mismatch between spinel and Si[ 141. Another candidate for crystalline insulator for SOI was CaF2, which has a close lattice parameter to Si. However, a reaction occurs at the CaF2ISi interface, leading to contamination of the interface region with Ca atoms[ 15,16]. Recently, CeO2 has gained much attention as a promising crystalline insulator. It has a CaF2 structure and the lattice mismatch of CeO2 to Si is estimated to be 0.35%, which has closer 551 Mat. Res. Soc. Symp. Proc. Vol. 318. 01994 Materials Research Society
latttice parameter to Si[ 17,181. The dielectric constant of CeO2 is =26, which makes it attractive as a capacitor material for dynamic random access memory[ 171. Epitaxial growth of CeO2 on Si was already reported[ 18,191 Potential ap
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