New Pt/(Bi,La) 4 Ti 3 O 12 /Si 3 N 4 /Si MFIS Structure for FET-Type Ferroelectric Memories by the Sol-Gel Method
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New Pt/(Bi,La)4Ti3O12/Si3N4/Si MFIS Structure for FET-Type Ferroelectric Memories by the Sol-Gel Method Takeshi Kijima, Yoshihisa Fujisaki and Hiroshi Ishiwara Frontier Collaborative Research Center Tokyo Institute of Technology 4259 Nagatsuta, Midori-ku, Yokohama 226-8503, Japan ABSTRACT The well c-axis-oriented Bi3.25La0.75Ti3O12 films with good crystallinity and good surface morphology were obtained at temperatures higher than 600
. It was also found in a Pt /
100nm-Bi3.25La0.75Ti3O12 / 3nm-Si3N4 / Si ( metal / ferroelectric / insulator / semiconductor ) structure that C-V characteristics showed a hysteresis loop with a memory window of about 1V and both the high and low capacitance values kept at zero bias voltage did not change for more than 3 hours.
INTRODUCTION Since first experimental demonstration of MFS-FET semiconductor field effect transistor
metal / ferroelectric /
by Moll and Tarui [1], MFS-FET has been expected as a
nonvolatile ferroelectric memory device with nondestructive readout operation. In the MFS structure, the ferroelectric thin films must be directly deposited on Si substrate. However, the interface reactions between ferroelectric materials and the Si substrate make it difficult to obtain a good ferroelectric / Si interface [2][3][4]. Thus, an MFIS structure ( metal / ferroelectric / insulator / semiconductor ) has extensively been investigated recently in order to avoid such an interface reaction. In the MFIS structure, it is desirable from a viewpoint of the data retention characteristics to choose a ferroelectric film with a small remanent polarization and to use it in the saturated polarization condition [5]. For this application, (Bi,La)4Ti3O12 is an important candidate, because it is known to be fatigue-free [6] and its remanent polarization Pr and coercive field Ec are as small as 4 C/ cm2 and 4kV/cm along the c-axis. However, the Pr and Ec values are as large as 50 C/cm2 and 50kV/cm along the a-axis. Thus, it is important in the use of this material to control the crystallite orientation in the film. This paper demonstrates the MFIS diode characteristics using the n- and p-type Si substrates to make the ferroelectric gate structured FETs of p- and n-channel. In order to form the MFIS structure, thin Si3N4 layers were first formed on Si substrates using atomic nitrogen radicals.[7] CC3.6.1
The method we used was the direct nitrification of a Si substrate by which we have obtained good MIS (Metal / Insulator / Semiconductor) characteristics even after the high temperature post annealings . Then, (Bi,La)4Ti3O12 films were deposited on the Si3N4 / Si structures using the spin-coating method of sol-gel solutions and the optimum conditions to obtain well c-axis-oriented (Bi,La)4Ti3O12 films were investigated. In the optimization procedure, the La content was fixed at 0.75, but such parameters as the Bi content in the sol-gel solution, temperatures of pre-annealing and crystallization annealing, crystallization ambient, and so on were changed.
EXPERIMENTAL First, Si3N4 thin layers
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