Secure JTAG Implementation Using Schnorr Protocol
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Secure JTAG Implementation Using Schnorr Protocol Amitabh Das & Jean Da Rolt & Santosh Ghosh & Stefaan Seys & Sophie Dupuis & Giorgio Di Natale & Marie-Lise Flottes & Bruno Rouzeyre & Ingrid Verbauwhede
Received: 30 May 2012 / Accepted: 8 March 2013 / Published online: 24 March 2013 # Springer Science+Business Media New York 2013
Abstract The standard IEEE 1149.1 (Test Access Port and Boundary-Scan Architecture, also known as JTAG port) provides a useful interface for embedded systems development, debug, and test. In an 1149.1-compatible integrated circuit, the JTAG port allows the circuit to be easily accessed from the external world, and even to control and observe the internal scan chains of the circuit. However, the JTAG port can be also exploited by attackers to mount several cryptographic attacks. In this paper we propose a novel architecture that implements a secure JTAG interface. Our JTAG scheme allows for mutual authentication between the device and the tester. In contrast to previous work, our scheme uses provably secure asymmetric-
key based authentication and verification protocols. The complete scheme is implemented in hardware and integrated with the standard JTAG interface. Detailed area and timing results are also presented.
Responsible Editor : M. Tehranipoor
Joint Test Action Group (JTAG) is the common name for what was later standardized as the IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture [15]. JTAG has remained as the ubiquitous test and debug interface standard for circuits and printed circuit boards in the semiconductor industry for more than two decades. The companion standard, IEEE Standard 1532 (BoundaryScan-Based In-System Configuration of Programmable Devices) has extended JTAG to support on-board programming [14]. A current IEEE standard proposal (P1687, also known as Internal JTAG) seeks to further enhance JTAG by allowing block transfer of data and special instruction sets in order to speed up In-System Programmability. JTAG was initially designed without a concern for security. As the capability of hardware attackers is increasing, more and more side-channels are discovered, which can compromise the security of a device. One such important side-channel is the improper use of the JTAG port. There have been many practical attacks on secure devices such as set-top box (STB) decoders using the JTAG interface [21]. ARM11 (Cortex) microcontroller, which is used in latest smartphones, has extensive test and debug facilities through the JTAG port. This is a well-known backdoor that is
A. Das (*) : S. Ghosh : S. Seys : I. Verbauwhede KU Leuven and iMinds, ESAT/COSIC, Leuven, Belgium e-mail: [email protected] S. Ghosh e-mail: [email protected] S. Seys e-mail: [email protected] I. Verbauwhede e-mail: [email protected] J. Da Rolt : S. Dupuis : G. Di Natale : M.-L. Flottes : B. Rouzeyre LIRMM (Université Montpellier II/CNRS UMR 5506), Montpellier, France J. Da Rolt e-mail: [email protected] S. Dupuis e-mail: dupuis@li
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