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TECHNOLOGY ADVANCES Tailoring Residual Stress in Multilayered Polysilicon Produced Near 600°C Expands MEMS Opportunities When a microelectromechanical system (MEMS) is integrated on a chip with complementary metal oxide semiconductor (CMOS) circuitry, the MEMS components are invariably fabricated first. This sequence is required because the MEMS structures are usually fabricated from polysilicon films that require high-temperature annealing (over 1000°C) to eliminate the residual stresses and stress gradients that would otherwise distort the MEMS structures on their release from the substrate. The shallow junctions in the CMOS elements and metallic interconnects would not survive such a heat treatment. Researchers at Case Western Reserve University have developed a technique to solve this problem; they can produce large-area polysilicon films by low-pressure chemical vapor deposition (LPCVD) using process temperatures that never exceed 615°C and that possess zero stress and zero stress gradients after deposition. This drastically reduced thermal budget allows MEMS components to be fabricated directly on top of CMOS circuitry, leading to enhanced performance and functionality. The technique, called the MultiPoly™ process,* involves the deposition of polysilicon layers with alternating compressive and tensile residual stresses. The individual layers are engineered to obtain the desired overall film stresses and net stress gradients. It has been known for some time that changing the deposition temperature of LPCVD polysilicon can change the sign of the residual stress. Films deposited between ~550°C and ~590°C display fine-grained, equiaxed microstructures with as-deposited tensile stresses, while films deposited between ~600°C and ~700°C display columnar (110) textured microstructures with as-deposited compressive stresses. The fine-grained microstructure results from the homogeneous nucleation and growth of silicon crystallites within an as-deposited amorphous silicon film; the tensile stresses are generated by the modest volume decrease associated with crystallization (amorphous Si has a slightly lower density than crystalline Si). The columnar microstructure results from the formation of crystalline-silicon films during deposition, in which growth occurs fastest in 110 directions. While the origin of the compressive stresses is not as well understood, it almost certainly involves nonequilibrium point defects in the as-deposited films. Figure 1a shows a cross-sectional trans-
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*The MultiPoly process was presented at the Materials Research Society MEMS Materials Issues workshop in April in San Francisco and was covered in a workshop report that appeared in the June 2002 issue of MRS Bulletin, p. 466.
Figure 1. (a) Cross-sectional transmission electron micrograph of a nine-layer MultiPoly film deposited alternately at 570°C and 615°C. Total thickness is 6.3 µm. Layer thicknesses (from substrate to free surface) are 0.67 µm, 0.86 µm, 0.77 µm, 0.64 µm, 0.87 µm, 0.67 µm, 0.57 µm, 0.61 µm, and 0.67 µm, where the fi
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