Real-Time Task Schedulers for a High-Performance Multi-Core System
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eal-Time Task Schedulers for a High-Performance Multi-Core System M. Lordwin Cecil Prabhakera, * and R. Saravana Ramb, ** aDepartment
of Electronics and Communication Engineering Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology (Deemed university), Chennai, Tamilnadu, India bDepartment of Electronics and Communication Engineering University College of Engineering, Dindigul, TN, India *e-mail: [email protected] **e-mail: [email protected] Received September 6, 2019; revised December 27, 2019; accepted January 21, 2020
Abstract—This paper proposes a multi-objective task scheduling algorithm for high performance realtime computing systems designed by the Multicore processor. Most real-time systems are battery powered and operate many complex mechanisms. In such a system, it is necessary to consider the energy consumption, core/processor utilization and deadlock miss rate to improve performance. In order to achieve high efficiency and low power consumption, a multi-objective real-time task scheduler is proposed considering voltage transaction delay, core utilization, unused cores and static and dynamic connection power. Single Objective Genetic Algorithm (GA) and Cellular GA (CGA) are implemented to compare the results with existing methods. The simulation results show that our approach improves performance relatively. Core utilisation is increases from about 5 to 7%. Moreover, the average power consumption decrease is about 12% compared to the existing proposed planners. Keywords: multi-core architecture, real-time task scheduler, multi-objective parallel scheduling algorithm, real-time computing system DOI: 10.3103/S0146411620040094
1. INTRODUCTION Low power and high performance multicore processors are required to implement complex real-time systems. To achieve this goal, the following parameters must be considered: (1) Energy consumption; (2) Utilisation and (3) Deadline Mistrate. The energy consumption is directly proportional to the switching factor (α), capacitance (C), voltage (V^2) and frequency (F), in which the first two parameters are static and the remaining factors are varies depending on the workload of the processor and its use [1, 2]. This can be calculated and optimized by implementing scheduling mechanisms. The following two basic methods are commonly used in multicore processors to reduce power consumption by changing the voltage and frequency: (1) Dynamic Voltage and Frequency Measurement (DVFS) and (2) Dynamic Power Management (DPM) [3–6]. The DVFS can be used effectively to reduce energy consumption and this can increase the efficiency of the processor. In real-time systems, the given tasks are executed on a multicore processor and shared simultaneously with common resources such as core and memory. Furthermore, each task has arrival time (Ri), execution time (Ei) and deadline (Di) constraints. Therefore, a decision-making algorithm is required to determine when to start the task of executing the task (for Eg: Earliest Deadline First (EDF), Rate Monotonic
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