SiC-Seeded Crystal Growth
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available for device fabrication is primarily an economics issue. For most nonpower applications, 50-75 mm wafers are sufficient for economical commercialization, while production of high-current power devices require 100 mm or larger diameter
wafers. In addition to size considerations, power devices which have a vertical structure requiring low-resistivity substrates have led to significant effort on the development of low-resistivity (105 ft cm) are required. Until recently the lack of high-resistivity (or semiinsulating) SiC substrates had severely limited the maximum frequency and efficiency of SiC microwave metal semiconductor field-effect transistors (MESFETs) and had been a roadblock for the development of SiC monolithic microwave integrated circuit (MMIC) technology. Recently, however, advances have been made in high-resistivity 4H-SiC substrate growth. Although the commercialization of small-area devices has been realized based on currently available wafers, the
Vapor Transport of Siand C-containing species
Figure 1. Schematic representation of a physical-vapor-transport-growth
system.
MRS BULLETIN/MARCH 1997
SiC-Seeded Crystal Growth
Table I: Primary Mechanisms of Micropipe Formation in SiC Sublimation Growth. Fundamental
Technological
2. Kinetic 1. Thermodynamic a. Thermal field uniformity a. Nucleation processes b. Inhomogenous supersaturation b. Dislocation formation c. Solid-state transformation c. Constitutional supercooling d. Vapor-phase composition d. Growth face morphology e. Vacancy supersaturation e. Capture of gas phase bubbles
. Process instabilities 2. Seed preparation 3. Contamination a. Temperature a. Holder a. Carbon purity b. Temperature gradient b. Surface quality b. SiC source purity c. Pressure c. Doping level
significant improvements in both wafer size and quality are necessary to fabricate the large-area devices required for SiC to achieve its full potential for power conditioning and control. Therefore, wafer defect density, diameter, and resistivity are key issues requiring the attention of researchers and developers. The depth of these issues and the amount of work in progress are too extensive for this forum, but in this brief article our goal is to introduce SiC bulk growth by describing (1) the vapor-phase growth process, (2) key parameters, and (3) defects of primary interest. Physical Vapor Transport of SiC: The Modified Lely or Seeded Sublimation Process While most single-crystal semiconductor boules are grown either from a melt or a solution, the properties of SiC make the use of either of these approaches impractical at present. The SiC phase diagram has a peritectic at 1 atm, and our calculations indicate that stoichiometric melting would only occur for pressures >100,000 atm and temperatures >3200°C Although creating similar growth conditions such as those used for diamond crystal growth is possible, this process is currently not feasible for commercial production of 50-100 mm diameter semiconductor-grade SiC boules. Furthermore the solubility of C in a Si m
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