Sm Doping Effects on Electrical Properties of Sol-Gel Derived SrBi 2 Ta 2 O 9 Films
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Sm Doping Effects on Electrical Properties of Sol-Gel Derived SrBi2Ta2O9 Films Eisuke Tokumitsu1,2, Masahito Kishi2 1 IT-21 Center, Research Institute of Electrical Communication, Tohoku University 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan 2 Precision and Intelligence Laboratory, Tokyo Institute of Technology 4259 Nagatsuta, Midori-ku, Yokohama 226-8503, Japan
ABSTRACT We have characterized (Sr,Sm)Bi2Ta2O9 (SSBT) films fabricated by the sol-gel technique on Pt/Ti/SiO2/Si substrates. For ferroelectric-gate FET applications, a ferroelectric film which has a small remanent polarization and a relatively large coercive field is required. It is demonstrated that Sm doping in ferroelectric SBT films is effective to reduce the remanent polarization and enhance the coercive field. Sr0.5Sm0.2Bi2.2Ta2O9 films (150nm) crystallized at 850oC exhibits good electrical properties with a remanent polarization of 1.7 µC/cm2 and a coercive fields of 85 kV/cm. These values are suitable for ferroelectric-gate FET applications.
INTRODUCTION Ferroelectric-gate field-effect transistors (FETs) [1-11] are one of the most promising nonvolatile memory devices, because of the non-destructive readout and scalability of the ferroelectric-gate FETs for high-density implementation. It should be noted that the requirements for the ferroelectric films used in the ferroelectric-gate FETs are much different from those for “capacitor-type” ferroelectric random access memories (FeRAMs), which are now commercially available. For conventional “capacitor-type” FeRAMs, a large remanent polarization (Pr) is required to obtain sufficient charge even with the small ferroelectric capacitors in high-density FeRAMs. In addition, a small coercive field (EC) is required to realize low operation voltage. On the other hand, for the “transistor-type” FeRAMs, the coercive field used in the ferroelectric-gate FETs should be relatively large to obtain a practical memory window because the memory window (i.e. threshold voltage shift) is given by 2EC·d, where EC and d means coercive field and thickness of the ferroelectric film, respectively. More importantly, the polarization of the ferroelectric film should be small enough to match the charge used to control the channel conductivity of the FET. The charge used for Si metal-oxide-semiconductor (MOS) FETs is usually less than 1 µC/cm2, which is much smaller than the polarizations in many ferroelectric materials. If conventional ferroelectric materials are used, since only a small part of the polarization, namely a small minor loop can be used, the memory window becomes small. To overcome this “charge-mismatch” problem, a metal-ferroelectric-metal-insulatorsemiconductor (MFMIS) structures have been used, because the ferroelectric MFM capacitor
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size (SF) and MIS capacitor size (SI) can be designed independently [7,8]. However, we have previously shown that an area ratio, SI/SF, should be larger than 10 to obtain good electrical properties in the MFMIS structures with conventional SrBi2Ta
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