Study on Dipole Layer Formation between Two Oxides : Experimental Evidences and Possible Models
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Study on Dipole Layer Formation between Two Oxides : Experimental Evidences and Possible Models Koji Kita and Akira Toriumi Department of Materials Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
ABSTRACT Hetero-interface between two oxides sometimes forms a dipole layer which is experimentally observable macroscopically, as an electric potential barrier at the interface. Investigation of the flatband voltage shift of the metal-insulator-semiconductor capacitors with bilayer oxides as the insulator is suitable to characterize the dipole formation at the interface of two oxides. A model to explain the driving force to form the dipole is discussed by taking account of the areal density difference of oxygen atoms at the interface, which should be a guideline to predict both the direction and magnitude of the interface dipoles. Based on this model the requirement for the oxides to form the dipoles is also discussed. I$TRODUCTIO$ In addition to the miniaturization, one of the most critical issues of the advanced metalinsulator-semiconductor (MIS) field-effect transistor (FET) is the tuning of the threshold voltage (VTH), the turn-on/off voltage, which should be adjusted close to zero. Historically the thermallygrown oxide on Si (amorphous SiO2) has been used as the gate insulator, but the introduction of high dielectric constant (high-k) oxide like HfO2 is inevitable in the advanced MISFETs, in order to reduce the leakage current density through the gate insulators while increasing the gate capacitance density. However, the introduction of high-k dielectrics causes the anomalous VTH shifts. Several possible mechanisms for this VTH shift have been argued, including the Fermilevel pinning (FLP) at the high-k/gate electrode interface [1]. However, the recent experimental results clarified that the formation of an electric “dipole layer” at the high-k/SiO2 dielectric interface should be the dominant origin of the VTH shift [2-5], in the case of non-Si based metal gate FETs (metal gate/high-k MISFETs). It should be noted that this concept of “dipole layer” indicates that the electronic potential barrier of hundreds of meV is formable only by stacking the insulating materials, high-k oxide and SiO2. It would also be worth mentioning that this phenomenon has not been observed for the interface of two high-k oxides, but only for the highk/SiO2 interface, which will be discussed later. Technologically the VTH adjustment has been successfully demonstrated by the introduction of dopants such as La2O3, MgO, and Al2O3, into Hf-based high-k films [4-8], and this VTH recovery was well interpreted as the modification of the “dipole layer” at high-k/SiO2 interface [5]. Please note that here we use the notation of “dipole layer” to describe the macroscopically observable electric potential barrier, which is steeply formed just at the interface. Such potential barrier can be modeled by a pair of sheet charges, where the exactly identical amount of positive and negative sheet charges align across the int
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