System Level Design of Reconfigurable Systems-on-Chip
System Level Design of Reconfigurable Systems-on-Chip provides insight in the challenges and difficulties encountered during the design of reconfigurable Systems-on-Chip (SoCs). Reconfiguration is becoming an important part of System-on-Chip design to cop
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System Level Design of Reconfigurable Systems-on-Chip Edited by
NIKOLAOS S. VOROS INTRACOM S.A., Patra, Greece and
KONSTANTINOS MASSELOS Imperial College of Science Technology and Medicine, London, U.K.
A C.I.P. Catalogue record for this book is available from the Library of Congress.
ISBN-10 ISBN-13 ISBN-10 ISBN-13
0-387-26103-6 (HB) 978-0-387-26103-4 (HB) 0-387-26104-4 ( e-book) 978-0-387-26104-1 (e-book)
Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springeronline.com
Printed on acid-free paper
All Rights Reserved © 2005 Springer No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Printed in the Netherlands.
Contents
Contributing Authors
7
Preface
9
Acknowledgments
11
Part A Reconfigurable Systems Introduction to Reconfigurable Hardware KONSTANTINOS MASSELOS AND NIKOLAOS S. VOROS
15 15
Reconfigurable Hardware Exploitation in Wireless Multimedia Communications KONSTANTINOS MASSELOS AND NIKOLAOS S. VOROS
27 27
Reconfigurable Hardware Technologies KONSTANTINOS MASSELOS AND NIKOLAOS S. VOROS
43 43
Part B System Level Design Methodology Design Flow for Reconfigurable Systems-on-Chip KONSTANTINOS MASSELOS AND NIKOLAOS S. VOROS SystemC Based Approach YANG QU AND KARI TIENSYRJÄ
87 87 107 107
6
System Level Design of Reconfigurable Systems-on-Chip
OCAPI-XL Based Approach MIROSLAV ýUPÁK AND LUC RIJNDERS
133 133
Part C Design Cases MPEG-4 Video Decoder MIROSLAV ýUPÁK AND LUC RIJNDERS
155 155
Prototyping of a HIPERLAN/2 Reconfigurable System-on-Chip KONSTANTINOS MASSELOS AND NIKOLAOS S. VOROS
179 179
WCDMA Detector YANG QU, MARKO PETTISSALO AND KARI TIENSYRJÄ
209 209
Contributing Authors
Miroslav Cupak, IMEC, Kapeldreef 75, B-3001 Leuven, Belgium Konstantinos Masselos Imperial College of Science Technology and Medicine, Exhibition Road, London, SW7 2BT, United Kingdom Marko Pettissalo Nokia Technology Platforms, P.O.Box 50, FIN-90571 Oulu, Finland Yang Qu VTT Electronics, P.O.Box 1100, FIN-90571 Oulu, Finland Luc Rijnders IMEC, Kapeldreef 75, B-3001 Leuven, Belgium Kari Tiensyrjä VTT Electronics, P.O.Box 1100, FIN-90571 Oulu, Finland Nikolaos S. Voros INTRACOM S.A., 254 Panepistimiou str., 26443, Patra, Greece
Preface
This book presents the perspective of the ADRIATIC project for the design of reconfigurable systems-on-chip, as perceived in the course of the research during 2001 - 2004. The project provided: (a) a high-level hardware/software co-design and co-verification methodology and tools for reconfigurable systems-on-chip, supplemented with back-end design tools for the implementation of the reconfigurable logic blocks of the chip, (b) the definition of the technological requirements for reconfi
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