Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA
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Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA Kostas Peppas Institute of Communication and Computer Systems, National Technical University of Athens, 9 Heroon Polytechniou, 15773 Zografou, Athens, Greece Email: [email protected]
Angeliki Alexiou Wireless Research, Bell Labs, Lucent Technologies, The Quadrant, Stonehill Green, Swindon SN5 7DJ, UK Email: [email protected]
Fotis Lazarakis Institute of Informatics and Telecommunications, National Center for Scientific Research “Demokritos,” Ag. Paraskevi, 15310 Athens, Greece Email: [email protected]
Tareq Al-Gizawi Institute of Communication and Computer Systems, National Technical University of Athens, 9 Heroon Polytechniou, 15773 Zografou, Athens, Greece Email: [email protected]
Dimitrios I. Axiotis Institute of Communication and Computer Systems, National Technical University of Athens, 9 Heroon Polytechniou, 15773 Zografou, Athens, Greece Email: [email protected] Received 15 March 2004; Revised 15 December 2004 A reconfigurable space-time coding technique is investigated, for a high-speed downlink packet access multiple-antenna network, which combats the effects of antenna correlation. Reconfigurability is achieved at the link level by introducing a linear precoder in a space-time block coded system. The technique assumes knowledge of the long-term characteristics of the channel, namely the channel correlation matrix at the transmitter. The benefits of the proposed reconfigurable technique as compared to the conventional non-reconfigurable versions are evaluated via system-level simulations. In order to characterize the system-level performance accurately and, at the same time, use a feasible approach in terms of computational complexity, a suitable linkto-system interface has been developed. The average system throughput and the number of satisfied users are the performance metrics of interest. Simulation results demonstrate the performance enhancements achieved by the application of reconfigurable techniques as compared to their conventional counterparts. Keywords and phrases: space-time block coding, linear precoding, reconfigurability, system-level performance, link-to-system level interface, high-speed downlink packet access.
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INTRODUCTION
Future-generation wireless systems design is expected to address a number of challenges, such as high data rates, improved link quality, and reconfigurability, that is, adaptivity to varying propagation and network conditions. These
requirements set a strong demand for significant advances in both radio access and network technology, highlighting the importance of reconfigurable transceiver architectures both horizontally (adaptive transceiver architectures within the context of one wireless access technology) and vertically (adaptive transceiver architectures to support one of multiple wireless
System Performance of Reconfigurable STC Techniques for HSDPA
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