Temperature-dependent Degradation Modes in CdS/CdTe Devices
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1012-Y01-07
Temperature-dependent Degradation Modes in CdS/CdTe Devices David S Albin1, Samuel H Demtsu2, Anna M Duda1, and Wyatt K Metzger1 1 National Renewable Energy Laboratory, 1617 Cole Blvd, Golden, CO, 80401 2 Solopower, Inc, 1635 McCandless Drive, Milpitas, CA, 95035 ABSTRACT A set of 24 identically made CdS/CdTe devices were subjected to accelerated lifetime testing (ALT) under open-circuit bias, 1 sun illumination, and temperatures of 60, 80, 100, and 120 °C. A total of 6 identical devices were tested for statistical purposes at each temperature. Current density-voltage (JV) measurements were made on stressed cells for up to 2000+ hours. Device performance parameters were calculated as a function of temperature and stress time using discrete element circuit models. Forward current behavior was represented by two parallel diodes to simulate recombination currents in the quasi-neutral (QNR) and space-charge (SCR) regions. Back contact behavior was studied using a parallel combination blocking diode and shunt conductance. A systematic pattern of degradation was apparent with increased stress temperature. At 60 °C, degradation associated with the CdTe/back contact dominates. At temperatures above 80 °C, greater losses in fill factor (FF) and open-circuit voltage (Voc) were observed. Recombination current modeling of JV data attributes this to increased space-charge recombination. Calculated diffusion lengths based upon an Arrhenius-derived activation energy of 0.63 eV in this temperature-range suggests Cu diffusion into the SCR is mechanistically responsible for the observed increased recombination, and decreased Voc and FF. At lower temperatures (60 to 80 ∫C), degradation was considerably slower with a measured activation energy of 2.9 eV. INTRODUCTION Polycrystalline CdS/CdTe devices show good solar cell potential with efficiencies of 16.5% having been demonstrated in the lab [1]. In addition to considerable research in maximizing performance, recent work has also focused on cell stability due to concerns surrounding the use of Cu as a dopant in these structures [2,3,4]. Stress testing typically involves elevated temperature as a means to accelerate degradation [5]. To date, temperatures ranging from 65 to 200 °C have been used in similar CdTe stability studies. Though most report using a fixed stress temperature, others have considered temperature itself as a variable [6]. Recently, it has been shown that processing can impart strong differences in stability, and thus potentially different degradation mechanisms [7,8]. Viable stress protocols require acceleration temperatures that only invoke mechanisms expected under actual use conditions. The primary goal of this study was to ascertain the presence and types of mechanisms affecting device stability in the temperature range of 60 to 120 °C.
EXPERIMENT Polycrystalline CdS and CdTe films were deposited by chemical bath deposition (CBD) and close-spaced sublimation (CSS) respectively. These layers were deposited on tin-oxidecoated Corning 7059 glass supers
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