The Designer's Guide to Jitter in Ring Oscillators
The Designer’s Guide to Jitter in Ring Oscillators provides information for engineers on designing voltage controlled oscillators (VCOs) and phase-locked loops (PLLs) for low jitter applications such as serial data communication and clock synthesis. The m
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The Designer’s Guide Book Series Series Editor:
Ken Kundert Cadence Design Systems San Jose, CA USA
The Designer’s Guide to Jitter in Ring Oscillators John A. McNeill and David S. Ricketts 978-0-387-76526-6 The Designer’s Guide to High-Purity Oscillators Emad Hegazi, Jacob Rael, and Asad Abidi 978-1-4020-7666-4 The Designer’s Guide to Verilog-AMS Ken Kundert and Olaf Zinke 978-1-4020-8044-9 The Designer’s Guide to SPICE and Spectre® Ken Kundert 978-0-7923-9571-3
For other titles published in this series, go to www.springer.com/series/6967
John A. McNeill • David S. Ricketts
The Designer’s Guide to Jitter in Ring Oscillators
John A. McNeill Worcester Polytechnic Institute Worcester, MA USA
David S. Ricketts Carnegie Mellon University Pittsburgh, PA USA
ISBN 978-0-387-76526-6 e-ISBN 978-0-387-76528-0 DOI: 10.1007/978-0-387-76528-0 Library of Congress Control Number: 2009920784 © Springer Science+Business Media, LLC 2009 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. While the advice and information in this book are believed to be true and accurate at the date of going to press, neither the authors nor the editors nor the publisher can accept any legal responsibility for any errors or omissions that may be made. The publisher makes no warranty, express or implied, with respect to the material contained herein. Printed on acid-free paper. springer.com
Preface
This is a book for engineers concerned with jitter: the effects of noise visible in the time domain. The material presented will be helpful for work at both the system level and the circuit level: •
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At the system level, the challenge is to describe, specify, and measure time domain uncertainty and when necessary, relate jitter to phase noise specifications in the frequency domain. At the circuit level, the challenge is to design low noise circuitry within power, area, and process constraints so that ultimate performance meets system level requirements.
Throughout the book concepts are presented in the context of an engineering application requiring low jitter performance: the voltage controlled oscillator (VCO) used in a phase-locked loop (PLL). Techniques are presented for circuit-level design of low jitter delay elements for use in ring oscillators, as well as relating the circuit-level characteristics to system-level performance. Although the emphasis is on time-domain (jitte
