The Effect of Forming Gas Annealing on Pt/(Ba,Sr)TiO 3 /Pt Thin Film Capacitors for Future Dram Applications: Electrical
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THE EFFECT OF FORMING GAS ANNEALING ON Pt/(Ba,Sr)TiO3/Pt THIN FILM CAPACITORS FOR FUTURE DRAM APPLICATIONS: ELECTRICAL PROPERTIES AND DEGRADATION MECHANISMS J. D. Baniecki*#, C. Parks*, R.B. Laibowitz***, T. M. Shaw***, J. Lian** *IBM Microelectronics, Semiconductor R&D Center, 1580 Route 52, Hopewell Junction, NY 12533 **Infineon Technologies, 1580 Route 52, Hopewell Junction, NY 12533 ***IBM Research Div, Yorktown Heights, NY 10598 #Present address: Fujitsu Laboratories, Atsugi, Japan ABSTRACT We have used electrical characterization and secondary ion mass spectroscopy (SIMS) to investigate the influence of hydrogen or deuterium (H/D) on the degradation of the electrical properties of Pt/Ba0.7Sr0.3TiO3/Pt thin film capacitors after forming gas exposure. Deuterium SIMS depth profiling shows that high deuterium concentrations can be incorporated into Pt/BSTO/Pt capacitors after forming gas annealing. The increase in H/D concentration in the film is accompanied by an increase in the leakage and dielectric relaxation current density. Voltage offsets in the capacitance-applied voltage (C-VA) characteristics after forming gas exposure at lower temperatures (20 oC) and a suppression in the capacitance density near zero applied D.C. bias after forming gas exposure at higher temperatures, suggests that one effect of forming gas exposure to Pt/BSTO/Pt thin film capacitors is to introduce positive space charge into the BSTO film. Using an equivalent model for a ferroelectric thin film capacitor, which incorporates lower permittivity interfacial layers and a nonlinear electric field-electric displacement relationship for the film interior, the effects of a uniform distribution of positive space charge on the theoretical C-VA and current density applied voltage (J-VA) characteristics are investigated. It is shown the model can account for many of the observed changes that occur in the experimental C-VA and J-VA characteristics after forming gas exposure. INTRODUCTION Integration of a high dielectric constant material into a standard CMOS process flow subjects the capacitor to various ambients during processing that may degrade the electrical properties of the capacitor. One important consideration is the effect of forming gas, which is commonly used to control SiO2/Si interface states, on the capacitance density and leakage currents of Pt/BSTO/Pt thin film capacitors. Many groups have studied the influence of forming gas exposure on the electrical properties of high dielectric constant thin film capacitors [1-11]. Most studies [4-8,11] have shown that annealing unpassivated Pt/BSTO/Pt thin film capacitors in forming gas results in a decrease in capacitance density and large increases in both leakage and dielectric relaxation currents rendering the capacitors unsuitable for DRAM applications. While it is fairly well established that catalytic metal electrodes, such as Pt, enhance the degradation in electric properties observed after forming gas annealing [1-3], the mechanism responsible for lower capacitance density and higher
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