Toward novel designs of reversible ternary 6:2 Compressor using efficient reversible ternary full-adders
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Toward novel designs of reversible ternary 6:2 Compressor using efficient reversible ternary full‑adders Mohammad‑Ali Asadi1 · Mohammad Mosleh1 · Majid Haghparast2 Accepted: 22 October 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract Integrated circuits always face with two major challenges including heat caused by energy losses and the area occupied. In recent years, different strategies have been presented to reduce these two major challenges. The implementations of circuits in a reversible manner as well as the use of multiple-valued logic are among the most successful strategies. Reversible circuits reduce energy loss and ultimately eliminate the problem of overheating in circuits. Preferring multiple-valued logic over binary logic can also greatly reduce area occupied of circuits. When switching from binary logic to multiple-valued logic, the dominant thought in binary logic is the basis of designing computational circuits in multiple-valued logic, and disregards the capabilities of multiple-valued logic. This can cause a minimal use of multiplevalued logic capabilities, increase complexity and delay in the multiple-valued computational circuits. In this paper, we first introduce an efficient reversible ternary half-adder. Afterward, using the reversible ternary half-adder, we introduce two reversible versions of traditional and comprehensive reversible ternary full-adders. Finally, using the introduced reversible ternary full-adders, we propose two novel designs of reversible ternary 6:2 Compressor. The results of the comparisons show that although the proposed circuits are similar to or better than previous corresponding designs in terms of criteria number of constant input and number of garbage outputs, they are superior in criterion quantum cost. Keywords Reversible logic · Ternary logic · Half-adder · Full-adder · Compressor
* Mohammad Mosleh [email protected] 1
Department of Computer Engineering, Dezful Branch, Islamic Azad University, Dezful, Iran
2
Department of Computer Engineering, Yadegar‑e‑Imam Khomeini (RAH) Shahre Rey Branch, Islamic Azad University, Tehran, Iran
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1 Introduction Occupied area and energy dissipation are considered as two challenging issues in VLSI industry. One of the solutions presented to reduce the occupied area, increasing speed and decreasing circuit complexity, is the use of multiple-valued logic (MVL) in circuit design. Ternary logic is one of the most popular multiplevalued logic that has attracted researchers in recent years [1]. Another issue that is very important in the design of integrated circuits which is increasingly getting significant is the issue of power consumption and energy losses reduction otherwise the smallest loss of energy in VLSI circuits causes too much heat and thus reduces the life and efficiency of the circuits. A solution that has attracted the attention of many digital designers in recent years is reversible circuits. Bennett has proven that circuit design
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