Transaction-Level Power Modeling
This book describes for readers a methodology for dynamic power estimation, using Transaction Level Modeling (TLM). The methodology exploits the existing tools for RTL simulation, design synthesis and SystemC prototyping to provide fast and accurate power
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TransactionLevel Power Modeling
Transaction-Level Power Modeling
Amr Baher Darwish Magdy Ali El-Moursy Mohamed Amin Dessouky •
Transaction-Level Power Modeling
123
•
Amr Baher Darwish Mentor a Siemens Business Cairo, Egypt
Magdy Ali El-Moursy Mentor a Siemens Business Cairo, Egypt
Mohamed Amin Dessouky Ain Shams University Cairo, Egypt
ISBN 978-3-030-24826-0 ISBN 978-3-030-24827-7 https://doi.org/10.1007/978-3-030-24827-7
(eBook)
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Preface
Transaction-Level Modeling (TLM) is a technique for building and developing designs. TLM introduces abstract modeling of communication schemes between design modules. It provides insights for system-level design at early stages of development. Thus, TLM accelerates the design cycle of System-on-Chip (SoC) in the industry. A novel methodology, referred to as Transaction-Level Power Modeling (TLPM), is proposed. It is used to evaluate power consumption using TLM. Evaluating power consumption at early phases of product design cycle is important to decrease the number of expensive design iterations. The methodology exploits the existing tools for Register Transfer Level (RTL) simulation, design synthesis, and SystemC prototyping to provide fast and accurate power results. TLPM is performed in two stages: power characterization on RTL and power modeling on TLM. Experimental results reveal both efficiency and accuracy of the TLPM methodology. TLPM speeds up the simulation time by more than two orders of magnitude over RTL, while the error in power estimation is less than 3%. Cairo, Egypt
Amr Baher Darwish Magdy Ali El-Moursy Mohamed Amin Dessouky
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Acknowledgements
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