A Methodology for Identification of Internal Nets for Improving Fault Coverage in Analog and Mixed Signal Circuits
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A Methodology for Identification of Internal Nets for Improving Fault Coverage in Analog and Mixed Signal Circuits Sayandeep Sanyal1
· Mayukh Bhattacharya2 · Amit Patra3 · Pallab Dasgupta1
Received: 5 July 2020 / Accepted: 18 November 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2021
Abstract Traditional literature on analog testing deals with the propagation of faults to the output ports of a circuit. Often the percentage of detected faults remains low because suitable stimuli cannot be found for propagating certain faults to the outputs. Existing technology supports monitoring internal nets of a circuit, thereby improving fault detection by observing their effect on internal nets. However, this approach is feasible only if the number of internal nets probed by the builtin test structure is limited. This paper presents a structured approach that identifies a small well-chosen subset of internal nets which, when probed, can increase the coverage of analog faults. Further, it describes a formal methodology to identify distinct sub-circuits in a given design, that could be independently probed for detection of faults. Thus, for a given fault universe, the complexity of simulations can be reduced significantly by simulating only the sub-circuits rather than the entire design. We utilize the speed of DC analysis, some common features of analog signals, and partitioning of the transistor netlist using a Channel Connected Graph to accomplish this outcome. We report significant improvement in fault coverage on several circuits including some Analog/Mixed-Signal benchmarks. Keywords Fault coverage · Analog faults · Analog circuits · Mixed-signal circuits · Channel connected graphs
1 Introduction Integrated circuits used in safety-critical systems are qualified via tests having a very high fault coverage. The ISO 26262 standard for automotive safety not only recommends a high fault coverage, but also advises that Responsible Editor: R. A. Parekhji Sayandeep Sanyal
[email protected] Mayukh Bhattacharya [email protected] Amit Patra [email protected] Pallab Dasgupta [email protected] 1
Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India
2
Synopsys Inc., California, USA
3
Department of Electrical Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India
the safety-critical circuit components be equipped with self-testing capability. Similar recommendations exist for railway applications (e.g., EN 50128) as well. While the methodology for finding tests with cumulative high coverage of faults is an established practice for digital designs, the same is not true for analog components. Analog designs often have built-in redundancies and feedback which compensate for variations caused by faults, thereby preventing the effect of the fault from propagating to the output. While this self-correcting nature is desirable, the inability to detect resident faults hides the increased vulnerability of the circuit and u
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