A Rapid Prototyping Environment for Wireless Communication Embedded Systems
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A Rapid Prototyping Environment for Wireless Communication Embedded Systems Bryan A. Jones Department of Electrical and Computer Engineering, Clemson University, 202A Riggs Hall, Clemson, SC 29634, USA Email: [email protected]
Joseph R. Cavallaro Department of Electrical and Computer Engineering, Rice University, Duncan Hall, MS 380, 6100 S. Main Street, Houston, TX 77005, USA Email: [email protected] Received 14 March 2002 and in revised form 13 February 2003 This paper introduces a rapid prototyping methodology which overcomes important barriers in the design and implementation of digital signal processing (DSP) algorithms and systems on embedded hardware platforms, such as cellular phones. This paper describes rapid prototyping in terms of a simulation/prototype bridge and in terms of appropriate language design. The simulation/prototype bridge combines the strengths of simulation and of prototyping, allowing the designer to develop and evaluate next-generation communications systems, partly in simulation on a host computer and partly as a prototype on embedded hardware. Appropriate language design allows designers to express a communications system as a block diagram, in which each block represents an algorithm specified by a set of equations. Software tools developed for this paper implement both concepts, and have been successfully used in the development of a next-generation code division multiple access (CDMA) cellular wireless communications system. Keywords and phrases: design partitioning, rapid prototyping, embedded systems.
1.
INTRODUCTION
Increasingly, highly sophisticated digital signal processing applications fuel the information revolution. Space-time codes, channel equalization, and source coding are founded on complicated systems of equations and are frequently interconnected with additional signal processing algorithms. However, many of these concepts prove difficult to implement in products. For example, the third generation (3G) standard for cell phones was developed in the mid-1990s, but still awaits widespread deployment. This paper provides digital signal processing (DSP) engineers with improved tools to implement these complex communications systems. The design cycle of a new DSP application begins as a rough sketch of a block diagram, as in Figure 1. Next, the design is refined by choosing algorithms that specify the functionality of each block. Each algorithm is further developed by deriving a set of equations to implement the algorithm. For example, choosing a finite impulse response (FIR) filter for the filter block in Figure 1 results in the equation out = i ini · coeff i . The communications system is then formed by labeling each block in the block diagram with the equations representing the chosen algorithms. Finally, the
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Filter
Output data
Figure 1: A rough sketch of the block diagram of a communications system.
design can be simulated on a host workstation and prototyped on embedded hardware. Figure 2 illustrates these possibilities. Input data may be generated
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