A unified approach of PID controller design for unstable processes with time delay
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A unified approach of PID controller design for unstable processes with time delay Ashraf RAZA, Md Nishat ANWAR Electrical Engineering Department, National Institute of Technology, Patna-800005, India © Central South University Press and Springer-Verlag GmbH Germany, part of Springer Nature 2020 Abstract: This paper addresses a unified approach of the PID controller design for low as well as high order unstable processes with time delay. The design method is based on the direct synthesis (DS) approach to achieve the enhanced load disturbance rejection. To improve the servo response, a two-degree of freedom control scheme has been considered. A suitable guideline has been provided to select the desired reference model in the DS scheme. The direct synthesis controller has been approximated to the PID controller using the frequency response matching method. A consistently better performance has been obtained in comparison with the recently reported methods. Key words: unstable process; maximum sensitivity; time delay; higher order process; direct synthesis method; frequency response matching Cite this article as: Ashraf RAZA, Md Nishat ANWAR. A unified approach of PID controller design for unstable processes with time delay [J]. Journal of Central South University, 2020, 27(9): 2643−2661. DOI: https://doi.org/ 10.1007/s11771-020-4488-6.
1 Introduction Unstable system contains at least one pole in the right half of s-plane and is found in different chemical processes such as polymerization reactors, heat exchangers. These processes are difficult to control as compared to the stable processes. In the last decade, researchers have given more attention towards the PID controller design for unstability with time delay system. PID controller is most widely used in process industries due to its simplicity, low cost and satisfactory performance for a variety of processes and more than 90% process industries use PI/PID controllers. But tuning of PI/PID controllers for unstable processes with process uncertainties is a difficult task due to the presence of the time delay term and the improper tuning may lead to poor robustness and large oscillatory responses [1]. Therefore, these
problems should be rectified to get enhanced performance. Many tuning rules have been proposed for the time delayed unstable process based on the internal model control (IMC) [2−10] or the direct synthesis (DS) [11−15] methods. VANAVIL et al [2] designed IMC based PID controller with lead-lag filter for first order unstable and integrating processes. SHAMSUZZOHA et al have designed IMC based PID controller with lead/lag filter for unstable first order plus dead time (UFOPDT) [3] and unstable second order plus dead time (USOPDT) [4] processes. YANG et al [5] designed IMC based controller either in PID or in higher order form for the unstable processes with one RHP pole only. An IMC-PID controller for integrating and unstable with time delay system is proposed by KUMAR et al [6] using the Pade’s approximation of the time delay term whereas SHAMSUZZOHA [7
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