Abrasive Contribution to CMP Friction
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Abrasive Contribution to CMP Friction David R. Evans1 and Michael R. Oliver2 Sharp Research Laboratories, Camas, Washington 98607 2 Portland, Oregon 97231 1
ABSTRACT Friction in the CMP process is a subject of ongoing interest. The sources of friction can be the viscosity of the slurry between the pad and wafer, as well as the physical contact between the pad asperities and the wafer. The contact between the pad and the wafer can be direct or also through slurry particles trapped between the pad asperity and the wafer. We measure the friction between the wafer and the pad by measuring the CMP table current and subtracting out the background level. This is done for different concentrations of silica abrasive between 0 and 13%, as well as for different pressures and table speeds. Two widely different types of silica particles used in CMP are spherical colloid particles and aggregated fumed particles. We also compare the resultant friction behavior by comparing the results for both types of particles. For different abrasive contributions, the friction measurements are compared to the CMP removal rates. This evaluation is also done with a stationary wafer carrier, so that the observed removal rate at a specific point on the wafer is proportional to the local pressure on the wafer. The wafer carrier used for these tests uses a gimbal design. In this case the pressure at the leading edge of the wafer is larger than that at the trailing edge. From these studies we find that, for gimbaled systems with grooved pads, the friction is primarily caused by pad-asperity contact, and the addition of slurry particles does significantly change the friction interaction in the CMP process. Further, the non-uniformity in friction across the wafer is controlled by the pad surface structure and mechanical design of the CMP tool. INTRODUCTION The study of frictional effects in CMP has grown in importance as chemical mechanical polishing (CMP) has evolved to be a key enabling step for new generations of semiconductor processes. One key area, of course, is the polishing of copper and barrier layers in the presence of fragile low-K dielectric materials used as dielectrics in copper-based interconnect technology. In addition, it is generally desirable to minimize local mechanical stresses to prevent generation of defects, such as in shallow trench isolation (STI) CMP where the thin films of silicon nitride are already stressed as a result of the deposition process. CMP was initially used to planarize silicon dioxide surfaces, which greatly improved the capability of multi-level processes. For such dielectric polishing, material removal occurs when oxide abrasive particles are on the surface of polishing pad asperities, which are pressed against the wafer and pulled across the surface [1]. The process requires specific types of oxide particles, and some of these particles, such as ceria, can demonstrate higher CMP removal rates than silicon dioxide particles [2,3]. Some other polishing steps, such as reactive liquid metal polishing, ca
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