Activation, Diffusion and Defect Analysis of a Spike Anneal Thermal Cycle
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Activation, Diffusion and Defect Analysis of a Spike Anneal Thermal Cycle Silke Paul 1, Wilfried Lerch 1, Xavier Hebras 2,*, Nikolay Cherkashin 3,*, Fuccio Cristiano 2,* 1 Mattson Thermal Products GmbH, Daimlerstr. 10, 89160 Dornstadt, Germany 2 LAAS-CNRS, 7 avenue du Colonel Roche, 31077 Toulouse, France 3 CEMES-CNRS, 29 rue Jeanne Marvig, 31055 Toulouse, France * Ion Implantation Group, CEMES-LAAS, Toulouse ABSTRACT In this paper, the evolution of sheet resistance, junction depth and defects during the whole thermal cycle of a typical spike anneal with a peak temperature of 1050 °C was investigated in detail. To this purpose, spike anneals were performed at peak temperatures ranging from 800 °C up to 1050 °C in temperature steps of 50 °C. These experiments were done both on B+ (500 eV, 1·1015 cm-2) and BF2+ (2.2 keV, 1·1015 cm-2) implanted wafers. It is found that for temperatures below 850 °C BF2+ implanted wafers exhibit a much better electrical activation, resulting in a lower sheet resistance, than B+ implanted ones, due to the amorphisation process occurring during the BF2+ implant and the subsequent solid phase epitaxial growth. In this low temperature regime, boron clustering takes place very rapidly in B+ implanted wafers, as confirmed by both SIMS and TEM analysis. In particular, “large” clusters, i.e. with diameter above the TEM detection limit (~2 nm), undergo a classical Ostwald ripening process (increase in size, decrease in density). SRP measurements indicate that boron activation in this low temperature regime is not related to cluster dissolution. On the other hand, after the initial solid phase epitaxial regrowth, BF2+ implanted wafers exhibit a slight increase in sheet resistance, due to boron clustering induced by the dissolution of end of range defects. Finally, it is found that at higher spike anneal temperatures (above 850 °C), both B+ and BF2+ implanted wafers exhibit a similar behaviour, with a progressive decrease in sheet resistance due to boron cluster dissolution and dopant diffusion.
INTRODUCTION Spike anneals in conjunction with ultra-low energy implants are widely used to form ultra shallow junctions for source/drain extensions in advanced CMOS devices. As scaling of the extension junctions continues, a deep understanding of the different phenomena involved in forming these junctions becomes mandatory. In general, pMOS devices imply the greatest challenges in fulfilling the requirements for sheet resistance and junction depth set by the ITRS [1]. Previous work in the characterisation of pMOS implants for source/drain extension junctions mainly concentrated on SIMS [2, 3] and four point probe sheet resistance measurement. Also, most of the published works concerned either high temperature spike anneals [4, 5] or recently low temperature solid phase epitaxial growth (SPEG) processes [6]. In this work we present the results of a detailed analysis of the whole thermal cycle of a spike anneal, ranging from 650 °C for 10 s (similar to SPE processes) and peak temperatures of 800 °C
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