Advanced Gettering Techniques in ULSI Technology
- PDF / 138,013 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 36 Downloads / 290 Views
A.A. Istratov, H. Hieslmair, and E.R. Weber Transition Metals and Silicon Technology Progress in silicon technology has been phenomenal since the invention of the transistor some 50 years ago. Device performance has improved by at least a factor of a million in every respect. As the minimum feature size on chips decreases toward 0.1 m, which should be reached on a mass-production scale in a few years, the device yield is becoming ever more sensitive to defects and impurities. Transition metals, particularly iron, nickel, and copper, are the most common and most detrimental contaminants on a process line, and they can be unintentionally introduced in nearly every process step, including ingot growth, wafer handling, ion implantation, wet-chemical cleaning, high-temperature anneals, or oxidation. To avoid yield losses, the silicon industry has to be very strict with respect to metal-contamination levels on the production line. For instance, for iron, the Semiconductor Industry Association (SIA) Roadmap presently specifies 2.5 1010 cm2 as the maximum tolerable surface concentration, decreasing to 5 109 cm2 by 2004. The origin of the detrimental effect of transition metals on device yield lies in their high diffusivity and solubility at elevated temperatures, combined with the extremely high electrical activity of metals and their complexes. One of the beststudied effects of metal contamination on devices is the degradation of the gate oxide integrity of metal oxide semiconductor (MOS) structures in the presence of iron contamination. This effect was explained by the formation of iron precipitates at the Si/SiO2 interface, which results in either local thinning of the oxide near the precipitate or increased electric-field strength at the tip of the precipitate, and by the formation of iron-related traps in the oxide layer, which enhances trapassisted tunneling of carriers through the MRS BULLETIN/JUNE 2000
oxide. Figure 1 shows how the minimum contamination level of iron sufficient to decrease the breakdown electric-field strength of the oxide and cause degrada-
tion of gate oxide integrity depends on the oxide thickness. This plot was built using the data from References 1–13, as detailed in Figure 1. The effect of iron contamination is strong: the threshold iron concentration changes by three orders of magnitude, from 1015 cm3 to 1012 cm3, as the oxide thickness decreases by a factor of five, from 30 nm to about 8 nm. Extrapolation of the straight line to oxide thicknesses of less than 5 nm (the crosshatched area in Figure 1) would give a value of about 1011 cm3 (which corresponds to about 1010 cm2 of iron on the surface) as an estimate of the threshold iron-contamination level that would be detrimental for very thin oxides. However, a recent study by D’Amico et al.,14 who compared the effect of iron on 7-nm and 3.5-nm oxides, indicated that thin (3.5-nm) oxides are actually less sensitive to iron contamination than thicker (7-nm) oxides. A similar conclusion was reached by Ravi.15 A possible explanation
Data Loading...
