Babbage Meets Zuse: A Minimal Mechanical Computer
This paper shows how to build a computer consisting of a few mechanical elements. Two large gears are needed, one for the data, and another for the program memory. Only one logical computing element is required. The idea of a simple computer with minimal
- PDF / 1,268,156 Bytes
- 10 Pages / 439.37 x 666.142 pts Page_size
- 41 Downloads / 193 Views
Abstract. This paper shows how to build a computer consisting of a few mechanical elements. Two large gears are needed, one for the data, and another for the program memory. Only one logical computing element is required. The idea of a simple computer with minimal computing logic goes back to Konrad Zuse, who called it the “logic machine”. Charles Babbage was the first one to design a universal mechanical computer. Here, we combine Babbage’s gears and wooden pegs with Zuse’s idea.
1 Introduction A conventional computer requires a memory for the data and a processor for transforming the data. The physical structure of the processor is fixed. If we think of a microprocessor just as a logic circuit, then we have a repeating cycle: some bits enter the circuit, are transformed, and are stored internally. Then the microprocessor starts again with a new cycle of operations. Figure 1 shows the structure of a logical circuit representing a microprocessor. The complete logic circuit can require the coordination of several intermediate binary results, so that the complete operation cycle needs to be broken in k subcircuits. Inside each subcircuit the order and exact timing of the operations is irrelevant, and the only rule is that a logical element needs to have its two inputs ready before it can produce a result. In the complete circuit, the single logical element used is the NAND operation, which is a complete basis for all binary logical operations. The k subcircuits are separated by internal buffers, which store the partial results and allow each subcircuit to synchronize. As Fig. 1 shows, we can number the logic elements, assigning each gate a sequential ID (only the NANDs in the first subcircuit have been numbered for this example). The input to each element, and its output, can be also uniquely numbered (in this example, only the inputs and outputs of the two logic elements to the upper left have been labeled). The labels for input and output of a logical element are “addresses” of one-bit cells where we can store those bits. The complete circuit operates from left to right: the bits are processed always one step further, and when the circuit is finished, it restarts a new cycle using the results from the previous cycle. An external memory represents only bits of data that can be also used. Intermediate results can be stored in that memory. Each memory address can store exactly one bit.
© Springer International Publishing Switzerland 2016 M. Amos and A. Condon (Eds.): UCNC 2016, LNCS 9726, pp. 25–34, 2016. DOI: 10.1007/978-3-319-41312-9_3
26
R. Rojas
Fig. 1. The circuit of a microprocessor divided in stages of computation. The memory buffers between stages are used to handle synchronization between the computations of different subcircuits, if needed. There is only one logic gate, the NAND. The NANDS are numbered. The connections are also numbered and represent addresses where bits can be stored before being used by a NAND computation, or as a result thereof.
We can simulate the microprocessor of Fig. 1 running, by lo
Data Loading...