Background on IC Reliability Simulation
Since the introduction of the first SPICE simulator in 1973 (Nagel and Pederson 1973), circuit designers use simulators to predict and optimize circuit performance at design time. This results in huge savings in development costs and enables a designer to
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Background on IC Reliability Simulation
4.1 Introduction Since the introduction of the first SPICE simulator in 1973 (Nagel and Pederson 1973), circuit designers use simulators to predict and optimize circuit performance at design time. This results in huge savings in development costs and enables a designer to maximize the performance of his or her circuit in a particular technology. Over time, computer-aided design (CAD) software has become more complex and more and more aspects related to IC development have been modeled and included in circuit simulation tools. As designers try to push their designs to the limit, using technologies with ever-smaller feature sizes, more and more reliability problems pop up. Guaranteeing sufficient product yield under the presence of process variations, for example, have become one of the first major IC reliability issues. To estimate the impact of process variations at design time, EDA companies have started to offer variation-aware simulation methods such as corner simulations or Monte-Carlo (MC) simulations. With transistor aging effects having an ever increasing impact on circuit performance (see Chap. 2), circuit reliability simulation is another important part of a modern IC design flow. Without such a tool, designers are forced to use design margins, extracted from measurements on individual transistors (e.g. limit VDD such that VTH < 50 mV after 10 years). However, these margins are often too restrictive and can result in huge circuit overdesign. Also, these rules do not guarantee circuit reliability, especially for analog circuits which tend to be very sensitive to small transistor parameter variations. Accurate reliability simulation therefore enables a designer to significantly increase the circuit design space, to meet tougher circuit specifications and to guarantee reliable circuit operation. In Sect. 4.2, this chapter first discusses the most important simulation methods published in literature. Special attention is given to BERT, which is one of the first reliability simulation toolsets, developed in the early 1990s by a group in UC Berkeley (Tu et al. 1993). Section 4.3 reviews the reliability simulators integrated in each of the E. Maricau and G. Gielen, Analog IC Reliability in Nanometer CMOS, Analog Circuits and Signal Processing, DOI: 10.1007/978-1-4614-6163-0_4, © Springer Science+Business Media New York 2013
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4 Background on IC Reliability Simulation
major commercial SPICE simulators: the Mentor Graphics Eldo reliability simulator, Cadence RelXpert and Synopsys MOSRA. Since most of these simulators are based on the methods discussed in Sect. 4.2, the focus of Sect. 4.3 is on the completeness of functionality and the usability of the tools.1 The advantages and disadvantages of the various academic and commercial simulators are discussed in Sect. 4.4. Finally Sect. 4.5 gives the conclusions of this chapter.
4.2 Literature Overview Guaranteeing circuit reliability in the presence of transistor aging has been a problem since the mid 1980s. As a cons
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