Capacitance Spectroscopy of Defects in a-SI:H/c-SI Heterostructures
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transport across the heterojunction and therefore the device quality.The aim of this work is the study of the defect density at the heterojunction interface and their effect on the transport properties of the diodes. We will show that low frequency capacitance measurements are a sensitive tool to study such interface defects. By systematically varying wafer surface cleaning conditions and comparing capacitance measurements, numerical simulation and IV curves, we will demonstrate how interface defects influence the capacitance and the transport properties of the heterodiodes. EXPERIMENTS Heterodiodes were prepared by a-Si:H deposition on p-doped 1(2cm float zone silicon wafers (100) with aluminium back contacts. A series of 5 samples with different surface treatments was prepared for the defined variation of surface quality, and interface defect density. For all samples the oxide overlayers of the wafers were removed by wet etching with buffered HF. For some diodes a H-plasma was applied to the wafer surface, and on some samples a 5nm thick intrinsic a-Si:H layer was deposited onto the wafer by using a standard DC glow-discharge system (see Table I ). Finally on all samples a highly n-doped (1% PH 3/SiH4) a-Si:H film was deposited. Aluminium was evaporated as a semitransparent front contact. Frequency and temperature dependent capacitance measurements (100Hz-1MHz) were performed using a HP463 Mat. Res. Soc. Symp. Proc. Vol. 557 ©1999 Materials Research Society
4192A impedance bridge and a liquid nitrogen cryostat. Current-voltage measurements were performed in the dark and under illumination using a electrometer and filtered tungsten-halogen light. Table I: Heterodiodes prepared for this study sample 1 0 H
H-plasma -
Yes
-100
Yes
5 nm 5 nm
I HI
(i)-a-Si:H layer 5 nm
(n)+-a-Si:H 60nm 100 inm nm 95nm 95 nm
CAPACITANCE MEASUREMENTS In figure 1 the temperature and frequency dependent capacitance is shown for sample 1. At temperatures below 150 K a capacitance step of 0.23 nF is observed. The temperature at which the step occurs shifts to higher temperatures for higher measurement frequencies. At higher temperatures the high-frequency capacitance increases little, whereas for low frequencies the increase is much bigger.
2.5x10-9
U_
2.0x10g ý 100 Hz
0
1.5x100*
1
100
150
250
200
f
MHz 300
350
T (K) Fig 1 Temperature dependent capacitance of sample I at different frequencies. The step below 150 K is due to the low conductivity of a-Si:H at these temperatures, which causes the dielectric relaxation frequency to be smaller than the voltage modulation frequency. The value of 0.23nF corresponds well to the geometrical capacitance calculated for the 65 run thick a-Si:H layer. The big increase of the low-frequency capacitance can be explained with the charging and decharging of defects. At a given defect energy, Ed, the defects contribute only at modulation frequencies lower than the thermal emission frequency Vemiss
464
Vem.iss= V
exp-
EQd1
where vyis the attempt-to-escape frequency, typically l012
