Cause of Forward Voltage Degradation for 4H-SiC PiN Diode with Additional Process
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Cause of Forward Voltage Degradation for 4H-SiC PiN Diode with Additional Process Tetsuro Hemmi1, Koji Nakayama1, Katsunori Asano1, Tetsuya Miyazawa2 and Hidekazu Tsuchida2 1 Power Engineering R&D Center, Kansai Electric Power Co., Inc., 3-11-20 Nakoji, Amagasaki, Hyogo 661-0974, Japan 2 Central Research Institute of Electric Power Industry, 2-6-1 Nagasaka, Yokosuka, Kanagawa 240-0196 Japan
ABSTRACT The forward voltage degradation in 4H-SiC PiN diodes with a simplified process and that in 4H-SiC pin diodes with additional processes are investigated. Photoluminescence images were also observed to identify the cause of forward voltage degradation. The forward voltage degradations of 4H-SiC PiN diodes with additional processes were larger than those with a simplified process. Observing photoluminescence images of diodes after a current stress test showed that less than 25% of Shockley-type stacking faults in 4H-SiC PiN diodes with a simplified process are caused by half-loop dislocations, which are generated not only in the additional processes but also in the whole device fabrication process. With additional processes, those rates are over 65%, which may be reduced by eliminating half-loop dislocations due to the optimization of the process condition and sequence.
INTRODUCTION During forward conduction, 4H-SiC bipolar devices have the serious problem of forward voltage increase (called forward voltage degradation). Forward voltage degradation is caused by Shockley-type stacking faults (SSFs), which consist of partial dislocations that are expanded in the drift layer [1]. The mechanism of forward voltage degradation is described as follows [2, 3, 4]: the basal plane dislocations (BPDs) in the drift layer expand to SSFs (which are considered to be plane defects) through electron–hole recombination. SSFs exist in perpendicularity to the direction of current flow in bipolar devices. An SSF acts as a lifetime killer of a minority carrier. An area containing an SSF exhibits higher resistance because of insufficient conductivity modulation, and barely any current flows through the area. Thus, the current flow areas in a device are significantly reduced by the expansion of SSFs, and the forward voltage increases [5]. Thus, forward voltage degradation is caused by the expansion of SSFs. SSFs extend from half-loop dislocations (HLs) as well as from BPDs. BPDs propagate from the substrate to the drift layer during epitaxial growth. In contrast, HLs are generated in the device fabrication process [6]. The effect of HLs on the forward voltage degradation, however, has not been reported. It would be of great significance to clarify the origin of SSF and the dependence of forward voltage degradation on them. We investigated forward voltage degradation in 4H-SiC PiN diodes with a simplified process and with additional processes. Moreover, photoluminescence (PL) images were also observed to identify the cause of forward voltage degradation.
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EXPERIMENT Figure 1 shows the device structure of a fabricated 4H-SiC PiN diode. The n
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