CeO 2 insulating films for application to high-temperature superconducting digital devices
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K. Higuchi and H. Yamamotob) Superconductivity Research Laboratory-International Superconductivity Technology Center (SRL-ISTEC), Koto-ku, Tokyo 135-0062, Japan; and Nihon University, Funabashi-city, Chiba 274-8501, Japan
K. Tanabe Superconductivity Research Laboratory-International Superconductivity Technology Center (SRL-ISTEC), Koto-ku, Tokyo 135-0062, Japan (Received 8 June 2005; accepted 18 October 2005)
CeO2 thin films as insulating layers for high-temperature superconducting digital devices were studied. The dependence on substrate temperature and oxygen pressure of the surface morphology and crystallinity of CeO2 thin films prepared by pulsed laser deposition were investigated. CeO2 thin films with a flat and closely grained surface were obtained at a relatively low oxygen pressure of 3.6 Pa, whereas higher oxygen pressure led to CeO2 thin films with a rough surface and columnar grains. The recovery of oxygen content in superconducting layers was examined for multilayer structures with CeO2 thin films. Enough oxygen was supplied to the upper and lower superconducting layers when the multilayer was cooled slowly in 3 × 10−4 Pa oxygen pressure after deposition. Resistively shunted junction type I-V characteristics were confirmed for interface-engineered ramp-edge junctions in a multilayer structure including four superconducting layers with CeO2 thin films.
I. INTRODUCTION
Electronic digital devices such as single flux quantum (SFQ) circuits are promising applications for hightemperature superconductors. They have the advantages of high-speed operation and low power consumption compared with ordinary electronic digital devices using semiconductors.1 Multilayer structures with hightemperature superconducting layers and insulating layers are required for realization of high-temperature digital devices. REBa2Cu3Oy (RE-123; RE ⳱ rare earth elements) thin films have been commonly applied to superconducting layers in such devices. High-temperature superconducting devices, including ramp-edge Josephson junctions with three RE-123 layers, which include a ground plane, a base electrode, and a counter electrode layer, were previously reported.2–4 Moreover, an a)
Address all correspondence to this author. e-mail: [email protected] b) This author was an editor of this journal during the review and decision stage. For the JMR policy on review and publication of manuscripts authored by editors, please refer to http://www.mrs. org/publications/jmr/policy.html. DOI: 10.1557/JMR.2006.0026 J. Mater. Res., Vol. 21, No. 1, Jan 2006
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additional wiring layer will be needed in the near the future for more complicated SFQ circuits. However, fabrication of multilayer structures becomes more difficult with an increasing number of layers. For instance, if a superconducting wiring layer and insulating layer are prepared after fabrication of Josephson junctions, the junctions may be harmed during the preparation of the upper layers. There are various candidat
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