Challenges and State-of-the-Art of Oxides on SiC
- PDF / 831,508 Bytes
- 10 Pages / 612 x 792 pts (letter) Page_size
- 29 Downloads / 190 Views
Challenges and State-of-the-Art of Oxides on SiC Lori Lipkin, Mrinal Das and John Palmour Cree Inc. Durham NC 27703, U.S.A. ABSTRACT Single crystal SiC is a wide band-gap semiconductor with material characteristics that make it quite suitable for high voltage and high current applications. However, these devices are currently limited by their passivation. Significant improvements have been made with oxides on SiC. The most notable oxide processes are the re-oxidation anneal, a stacked ONO dielectric, and nitridation using an NO or N2O anneal. Additional improvements in lateral MOSFET mobility have been achieved using a surface channel implant, and lower temperature implant activation anneals. However, the passivation remains a significant limitation for SiC power devices. THE PROBLEM Silicon carbide is well suited for power device applications. The high breakdown field of silicon carbide and its higher thermal conductivity are both key for power handling devices. There are several devices that are being currently developed at Cree which aim to leverage these advantages into superior power handling devices. However, these devices are all limited by the passivation or gate dielectric. Although many different dielectrics have been investigated, the most promising results have been achieved with silicon dioxide. The oxide passivation limits the power device in several different ways: • SiC has a higher dielectric constant than SiO2, so the field will be higher in the adjacent oxide (Gauss’ Law: ε1E1= ε2E2 ). • Very high interface state densities are present at the SiC:SiO2 interface. • Very high effective charge, most likely due to the interface states, is also present. • Long term reliability for MOS devices is also an issue. An illustration of the magnitude of these effects are shown in the next three figures. The high interface state densities greatly reduce the surface channel mobility of a lateral MOSFET, as shown in Figure 1, where the effective surface channel mobility of two different 4H-SiC MOSFET devices are compared. The interface state densities rise dramatically near the conduction band-edge, and as such, can only be approximated. An order of magnitude difference in the interface state density can decrease the effective mobility by more than an order of magnitude. The interface states limit surface channel mobility in two ways: 1) as they charge with the changing gate bias, they reduce the free current in the channel and 2) once charged, they act as scattering centers, inhibiting the flow of the remaining charge.
H3.1.1
Mobility (cm2/Vs)
15
14
Dit~1011 10
5
Dit~1012
0.5
0 0
5
10
15
20
25
30
Gate Voltage (V) Figure 1. The effect of interface state density (Dit) on the surface channel mobility of 4H-SiC MOSFETs. The effective surface channel mobility is shown in Figure 2 for devices with varying threshold voltages. As the effective (negative) charge is lowered, indicated by the threshold voltage approaching 0 V, the mobility dramatically increases. 80
Mobility (cm2/V-s)
70 60
6H-SiC
50 40
Data Loading...
