Growth and Metrology of Silicon Oxides on Silicon Carbide

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J9.4.1

Growth and Metrology of Silicon Oxides on Silicon Carbide Andrew M. Hoff Nanomaterials and Nanomanufacturing Research Center University of South Florida Tampa, FL 33620, U.S.A. ABSTRACT Thermal oxidation of SiC by the afterglow method has opened new pathways of opportunity to address both thin film growth and defects that hinder electronic device development with this important semiconductor material. Oxide growth, with rates up to 700Å per hour, on SiC has been demonstrated using this technique over a temperature range from 400°C to 1100°C at 1 Torr total pressure. Electrical and physical properties of oxide films grown by conventional means or by the afterglow method were obtained with a novel, non-contact charge-voltage (Q-V) metrology approach. This instrument employs a combination of incremental contact potential difference values obtained in response to applied corona charge generated from air. The slope of the Q-V characteristic within a bias range corresponding to accumulation of the semiconductor provides an effective dielectric permittivity value for the grown film. Effective permittivity values for afterglow oxides grown on SiC approach that of SiO2 grown on silicon substrates whereas the values for oxides grown on SiC in an atmospheric steam oxidation process are always depressed relative to SiO2 on silicon, indicating that the latter process always produces low-k oxides. A mechanistic discussion regarding these observed differences between the two oxidation methods is presented along with suggestions for an integrated process and metrology approach to reduce defects in oxide films on SiC. INTRODUCTION In this work, an integrated approach is presented that combines non-contact preparation-free metrology of both silicon carbide substrates, and of the thermally grown oxide thin films on these substrates, with a novel chemical processing method aimed at improving the SiC-oxide material system electrical properties. This new metrology mitigates many significant obstacles to rapid process learning such as high substrate costs, the time lag required to fabricate electronic devices, the questionable re-use substrates after metals have been applied, and the confounding of the effects of the process under study by succeeding device process steps. Based on the application of corona ions, generated in air, to the substrate surface and the subsequent measurement of the contact potential difference voltage, this metrology offers true in-line measurement results of as-processed wafers immediately following, for example, thermal oxidation. Although variations of this metrology have been applied to in-line process learning in the silicon integrated circuits industry for a decade it has only recently been applied to SiC technologies [1,2]. The chemical process method employed in this work creates chemical species in a remote plasma source and then transports these species into a furnace process region where substrates are maintained at a specified temperature. Hence, the generation of the process chemistry is not