Channel Strain Characterization in Semiconductor Device by Techniques Based on Transmission Electron Microscope
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Channel Strain Characterization in Semiconductor Device by Techniques Based on Transmission Electron Microscope Jinghong Li *, Jeff Johnson, Dureseti Chidambarrao, Yunyu Wang, Anthony G. Domenicucci Microelectronics, STG, IBM, Hopewell Junction, NY 12533, USA * Email: [email protected] ABSTRACT Three techniques based on transmission electron microscope (TEM) have been successfully applied to measure strain/stress in the channel area of PMOS semiconductor devices with embedded SiGe in the source/drain areas: convergent beam electron diffraction (CBED), nano beam diffraction (NBD) and dark-filed holography (DFH). Consistent channel strain measurements from the three techniques on the same TEM sample (eSiGe PMOS with 17%Ge) were obtained. Reliable strain/stress measurement results in the channel area have been achieved with very good agreement with computeraided design (TCAD) calculations. INTRODUCTION As semiconductor devices’ scaling approaches its limit, strain engineering has become more and more important in enhancing the performance of semiconductor devices.[1]-[3] PMOS device performance can be improved by applying compressive strain to the channel which improves hole mobility, while NMOS device performance can be improved by applying tensile strain to the channel which improves electron mobility. A common way to apply the strains is the use of embedded stressors in the source drain areas, i.e. SiGe and Si:C for PMOS and NMOS, respectively. It has become increasing important in the semiconductor industry to characterize channel strain accurately and reliably for better understanding of device performance and design. There are several strain characterization techniques available: wafer curvature, uXRD, Raman, convergent beam diffraction (CBED),[4], [5] nano-beam diffraction (NBD), [6] and dark-filed holography (DFH).[7] Techniques based TEM are powerful since they allow strain to be measured at the nanoscale. In this paper, channel strain measured by CBED, NBD and DFH will be briefly described, and experimentally determined channel strain by the three techniques will also be compared with device modeling. EXPERIMENTAL The sample studied in this work was a PFET device fabricated with embedded SiGe in the source/drain regions to stress the channel region. After gate formation, a selective recess etch process was used to etch the source/drain regions. Intrinsic Si0.83Ge0.17 was then selectively grown in the recessed S/D regions to complete formation of the stressor. Cross-sectional TEM samples were prepared by mechanical polishing followed by Argon ion beam milling to a final thickness of ~200nm. CBED analysis was
performed on a JEOL 2010F TEM equipped with a Gatan energy-filter, in the scanning transmission (STEM) mode with a probe size of 1 nm probe. The CBED experiments were performed by tilting to the zone axis. The CBED patterns were then analyzed using the ASAC software developed by SIS.[4], [7], [8] NBD was carried out in a JEOL 2010F with beam size of ~20nm with a condenser aperture of 10um. DFH was perf
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