Characteristics and Key Aspects of Complex Systems in Multistage Interconnection Networks
Multistage Interconnection Networks (MINs) have been used extensively to provide reliable and fast communication with effective cost. In this paper, four types of systems, characteristics and key aspects of complex systems, are discussed in the context of
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Characteristics and Key Aspects of Complex Systems in Multistage Interconnection Networks Indra Gunawan
Abstract Multistage Interconnection Networks (MINs) have been used extensively to provide reliable and fast communication with effective cost. In this paper, four types of systems, characteristics and key aspects of complex systems, are discussed in the context of MINs. Shuffle-Exchange Networks (SEN), a common network topology in MINs, is analysed as a complex system. Different perspectives on how MINs possess all characteristics of complex systems are discussed and therefore it is managed as complex systems accordingly. Keywords Complex systems · Multistage interconnection networks (MINs) · Shuffle-Exchange networks (SEN)
8.1 Introduction Although computer processing power has increased tremendously in the last few decades, the demand for processing power far exceeds the processing power that is currently available [1, 2, 28]. Thus there is a need for improved techniques that will deliver higher computer processing power to satisfy the needs of processor-intensive applications such as engineering and science simulations. This project looks at the notion of interconnection network as a means to fulfilling the demand for higher computer processing power. Interconnection network technology is used to link together multiple processormemory modules or computers in order to share resources, exchange data or to achieve parallel processing capability. Interconnection networks are applied in many fields such as telephone switches, supercomputers with multiprocessor and wide area networks [12].
I. Gunawan (B) The University of Adelaide, Adelaide, SA 5005, Australia e-mail: [email protected] © The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2021 K. B. Misra (ed.), Handbook of Advanced Performability Engineering, https://doi.org/10.1007/978-3-030-55732-4_8
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Interconnecting large number of processors and memory modules that allow communication among processors and processor-memory modules or in a communication network is a complicated task as issues such as connectivity, latency, bandwidth, cost, scalability and reliability need to be addressed. Numerous approaches had been proposed, ranging from single bus to fully connected architecture [24, 30]. Although the single-bus architecture can be easily implemented, its scalability highly depends on the bandwidth and requires arbitration of the bus usage, which somehow disallows parallel communication among processors or with memory modules. While a fully connected network might meet the need of parallel communication, it is difficult to rescale as it requires a large number of connection lines that make it impractical to be implemented in the real world. Other alternatives of interconnection networks include crossbar network, hypercube network, tree network and multistage interconnection networks. Each of these networks has its own advantages and disadvantages. Thus, it is difficult
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