Characterization of High-k Dielectrics by Combined Spectroscopic Ellipsometry (SE) and X-Ray Reflectometry (XRR)
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Characterization of High-k Dielectrics by Combined Spectroscopic Ellipsometry (SE) and X-Ray Reflectometry (XRR) L.Sun1, C. Defranoux2, J.L. Stehle2 P. Boher2, P. Evrard2, E. Bellandi3 and H. Bender4 1
SOPRA Inc., Westford, MA, USA SOPRA SA, 26 rue Pierre Joigneaux, 92270 Bois Colombes, France 3 STMicroelectronics, Via C.Olivetti 2, 20041 Agrate Brianza (MI), Italy 4 IMEC, Kapeldreef 75, B-3001 Leuven, Belgium 2
Abstract At present, new high-k dielectric materials are being intensively investigated to replace the silicon dioxide as gate dielectric for the next generation of electronic devices. Several candidate materials (such as ZrO2, HfO2, Al2O3) and deposition processes are currently under investigation. Because the layer thickness which is required in the next generations of devices is of the order of few nanometers, a precise determination and control of layer thickness will be mandatory. Although spectroscopic ellipsometry (SE) is well established non-contact, non-destructive and precise technique for determining thickness and optical properties of thin films, it becomes more difficult to obtain this information unambiguously and simultaneously for ultra-thin films with traditional SE alone because of possible high correlations between film structure and optical properties. The grazing x-ray reflectometry (XRR) is a complementary nondestructive optical technique and can be used to unambiguously determine ultra thin film thickness accurately. Combined with ellipsometry technique together, it will provide a promising way to characterize high-k gate dielectrics including thickness, roughness, interfacial layers and material composition information etc. In this paper, the principles for both SE and XRR will be briefly reviewed and limitation of each technique will be discussed. Following the high-k gate dielectric exploration and development, examples of using the combined SE/XRR techniques will be presented. 1. Introduction Silicon dioxide (SiO2) has been used for decades to isolate the transistor gate from the silicon channel in the silicon-based MOSFET (Metal-oxide-semiconductor field-effect transistor) due to its good manufacturability (thermal growth), superior electrical isolation, able to form stable and high quality SiO2/Si interface. However, further demand by industry based on both device performance (such as high speed, low power consumption) and cost requires continuous decrease in feature size and thus increase in the device density on the processing wafer. This corresponds to an increase in the gate dielectric capacitance. There are two ways to increase capacitance, i.e. decrease the dielectric (SiO2) thickness and/or find alternatives with higher dielectric constant. The former approach is problematic due to unacceptable high leakage current and reliability issue when SiO2 thickness approaches 10Å. Based on the concept of the equivalent oxide thickness (EOT), the same capacitance can be obtained with higher dielectric constant materials and with a relative thick films: 1 t high−k =
κ hig
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