Charge Trapping Analysis of High Speed Diamond FETs
- PDF / 911,479 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 92 Downloads / 207 Views
Charge Trapping Analysis of High Speed Diamond FETs Pankaj B. Shah, James Weil, A. Glen Birdwell, and Tony Ivanov Sensors and Electron Devices Directorate, US Army Research Laboratory, 2800 Powder Mill Rd, Adelphi, MD 20783, USA ABSTRACT Charge carrier trapping in diamond surface conduction field effect transistors (FETs) has been analyzed. For these devices two methods were used to obtain a negative electron affinity diamond surface; either plasma hydrogenation or annealing in an H2 environment. In both cases the Al2O3 gate dielectric can trap both electrons and holes in deep energy levels with emission timescales of seconds, while the diamond – Al2O3 interface traps exhibit much shorter time scales in the microsecond range. Capacitance-Voltage (CV) analysis indicates that these interface traps exhibit acceptor-like characteristics. Correlation with CV based free hole density measurements indicates that the conductance based interface trap analysis provides a method to quantify surface characteristics that lead to surface conduction in hydrogenated diamond where atmospheric adsorbates provide the acceptor states for transfer doping of the surface. INTRODUCTION Group III-nitride electronics have demonstrated a substantial scale up of power and frequency performance over that of GaAs and other high frequency material systems. However, as these devices are tasked in challenging high power RF applications, we are seeing limitations due to heat generation and removal. Advance techniques to mitigate this are still challenged by the thermal interface resistance between the active region semiconductor material and other heat removal layers. This interface resistance is dominated by defects at the interfaces affecting phonon transport and scattering. [1] One way to overcome these thermal limiting issues is to move to a new semiconductor material, and diamond appears to be the best candidate. Diamond’s high thermal conductivity, large breakdown field and high carrier mobility offer are its strengths. [2] Given the large ionization energies of bulk dopants in diamond, we are instead considering surface conduction devices. These are formed using a hydrogenated diamond surface which exhibits a negative electron affinity that aligns the valence band with acceptor states in an adjacent surface layer material. With the resulting migration of electrons from the diamond surface, a hole conduction channel is formed in the diamond region near the surface. High quality p-channel diamond FETs when paired with n-channel GaN FETs would offer complementary pairs for in power electronics. Organizations have already demonstrated that this conducting channel is a 2D hole gas. [3] For high frequency applications, the device turn-on must also be fast. In this work we describe the transient performance of our transfer doped diamond FETs. Charge carrier trapping is analyzed and related to device properties. EXPERIMENT For this work high grade single crystal diamond wafers 3 mm × 3 mm were obtained from Element6. A two-step chemical clean was perf
Data Loading...
