Combinatorial Studies of Switching and Solid-Phase Crystallization in Amorphous Silicon
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0894-LL02-01.1
Combinatorial Studies of Switching and Solid-Phase Crystallization in Amorphous Silicon Paul Stradins, Howard M. Branz, Jian Hu*, Scott Ward, and Qi Wang National Renewable Energy Laboratory, 1617 Cole Blvd. Golden, Colorado 80401, USA
ABSTRACT Combinatorial approaches are successfully applied for the optimization of electric writeonce, thin-film Si antifuse memory devices, as well as for studying the solid-phase epitaxy kinetics of amorphous silicon on c-Si. High forward, low reverse current thin film Si diode deposition recipes are selected using cross-strips of different combinations of amorphous and microcrystalline doped layers, as well as a thickness-wedged intrinsic a-Si:H buffer layer. By studying switching in thickness-wedged a-Si:H layers, it is found that switching requires both a critical field and a critical bias voltage across the metallic contacts. Solid-phase epitaxy speed has a non-linear dependence on the film thickness, which is easily observed by optical image monitoring and analysis in wedged a-Si:H films on c-Si wafers.
INTRODUCTION Combinatorial techniques significantly increase the speed of materials and device research [1,2], by combining multiple depositions and layer thickness variations on one or a few samples. It has been successfully employed in thin-film Si research [3]. In this work, we demonstrate the effectiveness of this approach in two areas of our research: 1) creation of an inexpensive, writeonce thin film Si electrical digital memory [4-6] and 2) study of the kinetics of the solid-phase epitaxy of Si for photovoltaic applications [7]. The principle of the electrical digital memory is shown on Fig.1. Each element consists of a amorphous silicon (a-Si:H) LeComber antifuse memory switch [8] and a thin-film Si diode [4] necessary for addressing these memory switches in an array. As deposited, the memory switch a layer of a-Si:H with metal contacts - is highly resistive and corresponds to logical 0. After application of a sufficiently high bias voltage, e.g. 6 V, to a selected element it switches to a permanent low-resistance state (logical 1) and can be detected by the high forward current of through the underlying diode. For the memory element to work satisfactorily, both the diode and the switch layer need to be optimized. For the thin-film Si diode, high forward current is necessary for the switching of the switch layer as well as for the detection of the ON-state once it has been formed. On the other hand, the diode should exhibit low reverse (leakage) currents in order not to interfere with detection of the state of other switches in array. For the a-Si:H switch, low switching bias voltages and currents as well as fast switching times are desirable. Both of these tasks require broad study of different layer structures (amorphous or microcrystalline) and thickness dependences. We address this problem with a combinatorial approach. Solid-phase epitaxy is studied with an aim to develop a new generation thin-film Si photovoltaic devices. These polycrystalline Si
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