CVD-Graphene Complementary Logic on Ultra-thin Multilayer Hexagonal Boron Nitride
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CVD-Graphene Complementary Logic on Ultra-thin Multilayer Hexagonal Boron Nitride Edwin Kim1,2, Nikhil Jain1, Yang Xu3, Yan Han3, and Bin Yu1 1 College of Nanoscale Science & Engineering, State University of New York, Albany, NY 12203, U.S.A. 2 Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO 80921, U.S.A. 3 Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China ABSTRACT Graphene, a two-dimensional carbon allotrope, has raised great interests as a material candidate for future electronics due to its superb carrier transport and unique physics. The demand for future-generation large-scale carbon-based electronics motivates assembly of largearea graphene and selection of ideal substrate material that best preserves the transport property of graphene. In this work, CVD-assembled large-area graphene on thin multilayer hexagonal boron nitride (h-BN) is employed to demonstrate the basic building block of digital circuit inverter prototype made of two graphene-channel field-effect transistors (GFETs). The doping in the CVD-grown graphene, probed via electrical measurements, is implemented through nonuniform local surface chemistry. The full transfer response of the graphene logic inverter is demonstrated in the localized P/N doping region. INTRODUCTION Graphene field-effect transistor (GFET) is a promising element for future carbon-based electronics thanks to the excellent properties of 2D carbon nanostructure. It features ultra-high carrier mobility, mechanical robustness, and planar configuration that potentially has great compatibility with the existing semiconductor chip fabrication techniques [1]. Since the discovery of graphene in 2004, significant amount of device research and experiments was based on mechanically exfoliated graphene from high-purity graphite. However, the large-scale and manufacturing-worthy fabrication of carbon-based electronics motivates chemical synthesis of graphene sheets [2]. Along with several experimental approaches to synthesize graphene, supporting substrate material plays a key role in preserving the carrier transport properties of graphene. Recently, h-BN substrate has been demonstrated to improve the graphene electronic performance by screening out undesirable carrier-scattering effects commonly observed in graphene/SiO2 system [3,4]. We also demonstrated the CVD-grown GFET on h-BN has superior electronic performance compared with GFET on SiO2 since h-BN screens the Coulomb scattering caused by the charged impurities in the interface between graphene and substrate as shown in figure 1 [5]. h-BN is an insulating isomorph of graphite with B and N atoms occupying the equivalent A and B sub-lattices in the Bernal structure. It is relatively inert and expected to be free of dangling bonds or charge traps in the surface. The atomically planar surface should suppress the rippling in graphene. With bandgap EG = 5.97 eV and dielectric constant ε ≈ 4 (close to that of SiO2), h-BN has negligibly small lattice mismatch
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