Deep Diffusions and SOI Layers Produced by Rapid Thermal Processing for Smart Power Applications
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silicon/aluminium solution moves through a Si wafer in minutes, leaving a highly Al doped trail behind it (Fig. 1). The liquid phase diffusion is driven by the vertical thermal gradient created through the wafer by a properly designed Rapid Thermal Processor. The work presented below is not the first attempt to use RTP for creating pn junctions via formation of Al-Si eutectic [2], but it is the first time that junctions extending through the wafer thickness are fabricated with RTP and electrically tested. TGZM is also used for micro-sensors fabrication [3]. On the other hand, because of an increasing demand, cost and availability of full silicon on insulator (SOI) substrates are no longer a problem for the VLSI domain. However, for the purpose of High Voltage (> 400V) Integrated Circuits (HVIC), i.e smart power applications, substrates with localised and thick SOI layers are needed because the power device is generally vertical and needs then to be embedded into a bulk substrate, whereas the low voltage circuitry has to be dielectrically isolated (see Fig. 1). However, the existing techniques are expensive while yield has still to be improved [5]. Moreover, SOI wafers with local oxide layers are not commercially available. We therefore present a method for recrystallization of thick polysilicon films by Lateral Epitaxial Growth over Oxide (LEGO) to fabricate substrates with localised SOI layers [6]. While similar to classical Zone Melting Recrystallisation (ZMR), this method avoids any horizontal thermal gradient in the solid phase and therefore produces less defects, while allowing the formation of much thicker films than in any other melt-based technique. This method has been previously developed by Celler et al. [7]; they called it Lateral Epitaxial Growth over Oxide (LEGO). They concentrated only on the material issues: VLSI technology was not asking for thick
319 Mat. Res. Soc. Symp. Proc. Vol. 470 01997 Materials Research Society
films and the concept of HVIC did not exist. More recently, LEGO was used for solar cell processing [8]. The application to HVIC presented here is new.
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deep diffusions for connection / isolation Figure 1: a typical smart-power structure fabricated with Uniform Zone Melting Recristallisation (SO1 area) and Temperature-Gradient Zone melting (deep P+wells). WAFER PREPARATION Deep diffusions A thick aluminum layer (5 gm) is evaporated on 3"Si (100) phosphorus-doped, 380 jim thick wafers. This layer is then patterned into a square grid of 150 gm wide lines oriented in vertical and horizontal directions. Both the choice of a well suited orientation for the lines [9] and the use of a thin (0,1 jim) passivation oxide (Spin-on Glass) reduce the molten wires break-up during the initialisation of migration. Wafers are heated at high temperature (near 1250'C) during 60 s in a RTP furnace. The design of this furnace (see below) provides a vertical thermal gradient (ideally 150°C/cm) through the wafer an
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