Defects Induced by Helium Implantation: Interaction with Boron and Phosphorus
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Defects Induced by Helium Implantation: Interaction with Boron and Phosphorus F. Cayrel1,2, D. Alquier1, F. Roqueta2, L. Ventura1, C. Dubois3 and D. Mathiot4 1
LMP, 16, rue Pierre et Marie Curie, B.P. 7155, F37071 TOURS Cedex, France
2
STMicroelectronics, 16, rue Pierre et Marie Curie, B.P. 7155, F37071 TOURS Cedex, France
3
L.P.M. - INSA Lyon, 20 rue A. Einstein, F-69621 Villeurbanne Cedex, France.
4
PHASE / CNRS, 23 rue du loess, B.P. 20, F67037 Strasbourg Cedex, France
ABSTRACT High dose He implantation, followed by a thermal annealing, is a suitable technique for metal gettering. Nevertheless, a strong interaction between the dopants and the defect layer has been evidenced. This can largely influence the dopant distribution. In order to study this interaction, p and n-type samples uniformly doped were implanted with helium (40 keV, 5x1016 He+.cm-2) and furnace annealed for various times and temperatures. In this paper, we shed light on the evolution of the dopant segregation. Using isochronal treatment, we found a large dependence of the dopant gettering phenomenon upon annealing temperature. Moreover, stability of the gettered fraction is observed for isothermal annealing. This study permits also to investigate the origin of the trapping mechanism involved for both boron and phosphorus.
INTRODUCTION Metallic impurities, even at extremely dilute concentration, are known to degrade the performance of semiconductor devices. Particularly during power device processing steps, metallic contaminations due to the high thermal treatments, lead to detrimental effects [1]. Many gettering techniques have been studied for lowering their concentration in active device areas. From the different one that can be used, POCl3 pre-deposition followed by a suitable thermal treatment is the common one. However, in case of bi-directional devices, such a gettering step can not be used owing to its design. Introducing gettering sites in the vicinity of active devices areas by means of ion implantation can be an attractive alternative to the classical techniques. It appears as a suitable gettering step to trap impurities on both sides of the device [2]. Cavity formation, induced by Helium implantation followed by a suitable annealing stage, was found to form efficient gettering centers for metallic impurities such as Au, Fe, Ni or Cu [25]. Nevertheless, the introduction of this step in a device process implies interactions of the defects layer with the dopants. The resulting modification of the dopant distribution could largely and seriously influence the electrical behaviour of the component. In a previous work [6,7,8], we have reported the impact of a defects layer introduced in silicon by helium implantation on dopants (boron and phosphorus), using Secondary Ion Mass Spectroscopy (SIMS) and Spreading Resistance Profilometry (SRP) results. These results indicate that the dopant segregation occurs within the cavity layer. In this study, we will present the evolution of the dopant segregation through different annealing steps.