Design-oriented fast response voltage mode buck converter with adaptive ramp control
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ORIGINAL ARTICLE
Design‑oriented fast response voltage mode buck converter with adaptive ramp control Xingxing Peng1 · Changgeng Li1 Received: 18 March 2020 / Revised: 8 June 2020 / Accepted: 10 June 2020 © The Korean Institute of Power Electronics 2020
Abstract This paper proposes a new adaptive ramp voltage mode control scheme. Instead of using the conventional slow compensation path of the voltage mode, the proposed scheme adds an extra feedback path to adjust the amplitude and DC-offset of the ramp signal and to directly accelerate the duty cycle according to the output voltage variation. In addition, a designoriented analytical method is adopted to intuitively analyzes the loop characteristics and provides accurate instructions for the implementation and optimization of the compensator. A 5–1 V buck converter is implemented in the proposed adaptive ramp control scheme with optimized compensation. Simulation and measurement results show that the converter achieves a bandwidth of up to 591 kHz with a 3 MHz switching frequency and a 65° phase margin. In addition, the undershoot voltage and the recovery time are 16 mV and 19 μs with a load change from 0.5 to 1 A. The proposed control scheme shows superior transient response performance while maintaining fixed frequency operations with a simple system structure. Keywords Adaptive ramp · Design-oriented analysis · Voltage mode · Fast transient response
1 Introduction In recent years, wireless portable electronics have dramatically increased and become necessities in daily life. To extend the battery lifetime of portable electronics, many portable devices remain in their standby mode during most of their operation to reduce power consumption [1]. Dynamic voltage scaling is regarded as an effective power management solution. In addition, a noiseless power supply is essential to obtain a high signal-to-noise ratio. A fast load transient response for a small overshoot or undershoot of the output voltage is important in the design of a DC–DC regulator that regulates the battery supply to different internal voltages [2]. When portable devices suddenly start to run heavy tasks, the required current is giant. Without a high enough response speed, a large overshoot or undershoot can induce system running errors and lead to extra power consumption. Hence, a fast transient response is a necessary design consideration for DC–DC voltage regulators to
* Changgeng Li [email protected] 1
School of Physics and Electronics, Central South University, Changsha, China
provide good dynamic performance [3] and to ensure the stability of the regulator. The voltage mode (VM) control scheme has been favored for high performance DC–DC voltage regulators due to its ease of implementation and good anti-perturbation performance [4, 5]. Meanwhile, the VM always gets good regulation performance through the negative feedback loop building with a high gain error amplifier (EA). However, using frequency-compensated error amplifiers and large compensation capacitors results in a deteriorati
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