Three-level buck converter utilizing a DAC-based flying capacitor voltage control technique
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Three-level buck converter utilizing a DAC-based flying capacitor voltage control technique Jin-Woo So1 • Hong-Reoul Yang1 • Su-Mi Park1 • Jonghwan Lee2 • Byung Seong Bae3 • Kwang Sub Yoon1 Received: 23 March 2020 / Revised: 11 August 2020 / Accepted: 16 October 2020 Ó Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract This paper proposes a three-level buck converter utilizing a Digital-to-Analog Converter (DAC)-based flying capacitor voltage control technique, which controls the voltage on a flying capacitor with a differential difference amplifier and common mode feedback circuit for stable operation. Employment of the DAC-based flying capacitor voltage control circuit allows the proposed circuit to compensate for the inductor voltage error as the load current varies. The proposed three-level buck converter was implemented with a CMOS 180 nm standard process. The measurement results demonstrate the wide range of the input and output voltage from 2.7 V to 3.6 V and 0.7 V to 2.4 V, respectively. The proposed three-level buck converter achieved the peak power efficiency of 91% and output ripple voltage of 32.5 mV at the switching frequency of 2 MHz and load current range of 10 mA to 400 mA. Keywords DAC Flying capacitor voltage control PMIC Three-level buck
1 Introduction With the rapid development of electronic and communication technologies, portable devices such as smartphones and internet of things systems have become popular [1]. As a result, demand on application processors (AP) and microprocessors (MPU) within portable devices has been increasing. To minimize the power consumption of APs and MPUs within portable devices, having a power management circuit that effectively controls battery power has become mandatory [2, 3]. The output ripple voltage and switching loss of a typical three-level buck converter have known to be less than those of the conventional buck converters [4, 5]. As a result, the power conversion efficiency of three-level converters is typically higher than that of conventional buck converters. & Kwang Sub Yoon [email protected] 1
Department of Electronic Engineering, Inha University, Incheon, South Korea
2
Department of System Semiconductor, Sangmyung University, Seoul, South Korea
3
School of Electronics and Display Engineering, Hoseo University, Asan, South Korea
However, conventional three-level buck converters suffer from fluctuation of the flying capacitor voltage due to the circuit delay time, parasitic components of power switches, and flying capacitors, which result in unstable operation [4]. The three-level buck converter proposed by Xue abd Lee [5] employed the fixed on-time method to control the flying capacitor voltage without an additional circuit. However, this method is inapplicable to the PWM method. Three design techniques have been proposed to prevent three-level buck converters from experiencing unstable operation [6–8]. The control technique of adjusting the voltage on the gate driver of the power switch has been proposed [6] to min
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