Electrical Characteristics of Metal - (La 0.27 Y 0.73 ) 2 O 3 - Silicon Capacitors
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Electrical Characteristics of Metal - (La0.27Y0.73)2O3 - Silicon Capacitors E. J. Preisler, N. A. Bojarczuk, and S. Guha IBM T. J. Watson Research Laboratory, 1101 Kitchawan Rd., Yorktown Hts. NY 10598 ABSTRACT An investigation of metal-insulator-silicon capacitors, utilizing single crystal (La0.27Y0.73)2O3 as the insulator is presented. Crystalline insulators are of interest because of the possibilities of obtaining an atomically flat interface and entirely eliminating the presence of dangling bonds at the interface. Capacitance – voltage measurements performed on MIS capacitors demonstrate a dielectric constant of 11.4 and suggest the absence of any interfacial silicon oxide layer. The equivalent oxide thickness of the sample with the thinnest dielectric layer is 15 Å. The density of interface states for the best samples is found to be in the mid 1012 cm-2eV-1 range and did not vary significantly after typical annealing treatments. INTRODUCTION As the dimensions of traditional metal-oxide-silicon field effect transistors (MOSFET’s) continue to shrink, one of the most pressing impediments to creating future generations of devices is the thinning of the gate insulator1. As the traditional SiO2 gate dielectric approaches thicknesses at which quantum mechanical tunneling becomes significant relative to the source-drain current, either different device paradigms or an alternate gate insulator will need to be sought in order to achieve a continuing improvement in device performance with each successive generation of MOSFET technology. Among the many candidates for an alternative gate dielectric, most are hampered by one or more of the following issues: 1) a low conduction and/or valence band offset relative to silicon which allows tunneling current to become significant at lower biases, 2) poor stability when exposed to processing conditions and 3) a high density of states in the bandgap at the silicon-insulator interface. It has been suggested that some or all of these problems can be mitigated by crystalline insulators2. By growing an epitaxial single crystal gate insulator, interface states theoretically can be suppressed entirely and the presence of any amorphous interfacial silicon oxide layer can be eliminated3. It has been shown that an oxide of alloy concentration (La0.27Y0.73)2O3 (hereafter LaYO) can be grown epitaxially on oriented silicon, forming a high quality crystalline layer4. In this study, the electrical characteristics of the lanthanum-yttrium oxide / silicon system are discussed. EXPERIMENT All of the samples used in this study were grown on n-type silicon wafers oriented with the surface normal parallel to the direction. Wafers were cleaned by standard methods and introduced to an ultra-high vacuum (UHV) system held at a base pressure of
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about 1×10-10 Torr. An undoped epitaxial silicon layer of approximately 50 Å was grown on all samples in order to obtain a consistent starting surface. At the end of this step, all samples exhibited sharp 7×7 reconstruction patterns as observed by
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