Structural and Electrical Properties of Y 2 O 3 Buffer Layer Prepared by Two Step Process

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Structural and Electrical Properties of Y2O3 Buffer Layer Prepared by Two Step Process Dong-Gun Lim, Bum-Sik Jang, Sang-Il Moon, Dong-Min Jang, Jinhee Heo, and Junsin Yi School of Electrical and Computer Engineering, Sungkyunkwan University, 300 Chunchun-dong, Jangan-gu, Suwon, Kyunggi-do, 440-746 Korea G

ABSTRACT In this paper we investigated a feasibility of Y2O3 films as a buffer layer of MFIS (metal ferroelectric insulator semiconductor) type capacitor. Buffer layers were prepared by two-step process of a low temperature film growth and subsequent RTA treatment. Investigated parameters are given as substrate temperature, O2 partial pressure, post-annealing temperature, and suppression method of interfacial SiO2 layer generation. By employing an ultra thin Y pre-metal layer, unwanted SiO2 layer generation was successfully suppressed at an interface between the buffer layer and Si substrate. By using two-step process, we improved the leakage current density of Y2O3 films by 2 orders and the Dit as low as 8.72 1010 cm-2eV-1. For a substrate temperature above 400oC and O2 partial pressure of 20%, we observed cubic Y2O3 phase domination in XRD spectra. We achieved 1.75% lattice mismatch between Y2O3 film and silicon substrate. Y2O3 buffer layer for a single transistor FRAM exhibited optimal properties when it was grown at 400oC with 20% O2 partial pressure then RTA treatment at 900oC in oxygen ambient.

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INTRODUCTION A metal-ferroelectric-silicon (MFS) structure is widely studied for nondestructive readout (NDRO) memory devices, but conventional MFS structure has two critical problems [1]. It is difficult to obtain ferroelectric film like Pb(Zr,Ti)O3 (PZT) on Si substrate without interdiffusion of impurities such as Pb, Ti, and other elements. Diffusion of Pb or Ti induces increased trap density and Fermi level pinning. PZT/Si structure generates nonferroelectric and low dielectric constant layer at the interface. Unintentionally, the interfacial oxide layer causes problems on device instability, capacitance reduction, and increases memory-switching voltage. Because voltage drop across the unwanted interfacial oxide layer is very high, we have to supply the higher input voltage to operate ferroelectric films in write and read mode. In order to solve these problems, the metalferroelectric-insulator-silicon (MFIS) structure has been proposed with a buffer layer of high dielectric constant like Y2O3. Buffer layer candidate should meet the following requirements of low lattice mismatch, low leakage current, low interface state density, high dielectric constant, chemical stability, and blocking of interdiffusion. Y2O3 films were investigated because of their capability to meet the prior mentioned requirements [2]. Y2O3 takes one of the cubic structures and shows similar lattice constant (aY2O3=1.060 nm) to silicon (aSi×2=1.086 nm) [3]. Generally, crystalline Y2O3 films are formed at a high deposition temperature. However, the high process temperature causes a chemical reaction with Si substrate to produce silicide. To

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