Evidence and Characterization of Crystallographic Defect and Material Quality after SLIM-Cut Process
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Evidence and Characterization of Crystallographic Defect and Material Quality after SLIM-Cut Process Alex Masolin1,2, Jan Vaes2, Frederic Dross2, Roberto Martini1, Amaia Pesquera Rodriguez3, Jef Poortmans1,2, Robert Mertens1,2 1 Katholieke Universiteit Leuven, Leuven, Belgium; 2imec, Leuven, Belgium; 3University of Basque Country, Bilbao, Spain
ABSTRACT The SLIM-Cut process is a kerf-free wafering technique to obtain silicon substrates as thin as 50μm. The quality of the resulting material must be assessed to ensure that this innovative Si-foil approach does not jeopardize the potential efficiency of the final solar cell in terms of electronic activity, defect density and location. For that reason, we performed Microwave-Detected Photoconductance Decay (MW-PCD), Deep-Level Transient Spectroscopy (DLTS) and optical inspections after defect etching of the foils surface. Analyses indicate that SLIM-Cut generates crystallographic defects which create deep level traps that have a negative impact on the lifetime of the silicon foil. Nonetheless, a decrease of the thermal budget will lead to a reduction of plasticity and hence lower the amount of defects and increase the foil quality. INTRODUCTION In order to reduce material-related costs, the SLIM-Cut method addresses an important challenge of crystalline-Si for photovoltaics: kerf-free wafering of substrates as thin as 50μm [1]. Made of single-crystalline material, the Si-foils have the potential to provide high-efficiency solar cells, given the material quality is not dramatically degraded during the SLIM-Cut process. Therefore, the quality of the material must be assessed to ensure that this innovative foil approach does not jeopardize the potential energy conversion efficiency of the final solar cell. SLIM-Cut relies only on thermo-mechanical treatments [1]. A layer of a material with a thermal coefficient of expansion (TCE) largely different from silicon is deposited on top of a bare silicon substrate that could be as thick as a few centimeters. The system formed by the silicon substrate and the stress-inducing layer is brought to high temperature (>600°C). During this rapid thermal process (RTP) a change of phase in the system creates a strong bond between the parent silicon substrate and the stress-inducing layer. Upon cooling down, the stress-inducing layer tends to shrink more than the silicon giving rise to a stress field inside the silicon substrate. When this stress is higher than the ultimate tensile strength of silicon, a fracture will occur with a spall-off of a thin silicon layer. Under given conditions, this fracture can be controlled in terms of depth and direction. The aim of the SLIM-Cut development is to target a smooth crack path propagating at a depth of ~50μm parallel to the original surface. The process flow, shown in Fig. 1, is as follows: 1) Deposition by screen-printing of a silver layer (18.7±0.7 mg/cm2), 2) Silver paste drying, 3) First RTP at high temperature (set-point of the belt furnace ~850°C) in air, 4) Second deposition by screen-prin
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