Extensive Soft Error Evaluation
This chapter utilizes the power of the fault injection framework previously detailed to investigate soft error reliability from two distinct approaches: (1) the impact of different software stacks including OS, parallelization library, ISA using more than
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t Error Reliability Using Virtual Platforms Early Evaluation of Multicore Systems
Soft Error Reliability Using Virtual Platforms
Felipe Rocha da Rosa • Luciano Ost • Ricardo Reis
Soft Error Reliability Using Virtual Platforms Early Evaluation of Multicore Systems
Felipe Rocha da Rosa Arm (United Kingdom) Cambridge, UK
Luciano Ost Loughborough University Loughborough, UK
Ricardo Reis Instituto de Informatica Univ Federal do Rio Grande do Sul Porto Alegre Rio Grande do Sul, Brazil
Disclaimer: The views and opinions expressed in this book are those of the authors and do not necessarily reflect the official policy or position or Arm LTD.
ISBN 978-3-030-55703-4 ISBN 978-3-030-55704-1 (eBook) https://doi.org/10.1007/978-3-030-55704-1 © The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2020 This work is subject to copyright. All rights are solely and exclusively licensed by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. The publisher, the authors, and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, expressed or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations. This Springer imprint is published by the registered company Springer Nature Switzerland AG The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland
Preface
The increasing computing capacity of multicore components such as processors and GPUs offers new opportunities for embedded and high-performance computing (HPC) domains. The progressively growing computing capacity of multicore-based systems enables to efficiently perform complex application workloads at a lower power consumption compared to traditional single-core solutions. Such efficiency and the ever-increasing complexity of application workloads encourage the industry to integrate more and more computing components into the same system. The number of computing components employed in large-scale HPC systems already exceeds a million cores, while 1000-cores on-chip platforms are available in the embedded community. Beyond the massive number of cores, the increasin
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