Fabrication of ultrahigh-density nanowires by electrochemical nanolithography

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NANO EXPRESS

Open Access

Fabrication of ultrahigh-density nanowires by electrochemical nanolithography Feng Chen1,2, Hongquan Jiang2, Arnold M Kiefer2, Anna M Clausen2, Yuk-Hong Ting2, Amy E Wendt2, Bingjun Ding1 and Max G Lagally2*

Abstract An approach has been developed to produce silver nanoparticles (AgNPs) rapidly on semiconductor wafers using electrochemical deposition. The closely packed AgNPs have a density of up to 1.4 × 1011 cm-2 with good size uniformity. AgNPs retain their shape and position on the substrate when used as nanomasks for producing ultrahigh-density vertical nanowire arrays with controllable size, making it a one-step nanolithography technique. We demonstrate this method on Si/SiGe multilayer superlattices using electrochemical nanopatterning and plasma etching to obtain high-density Si/SiGe multilayer superlattice nanowires. Introduction Low-dimensional systems are of high interest because their unique properties can improve device performance in a range of applications, including optics [1,2], mechanics [3], microelectronics [4], and magnetics [5]. These systems have enhanced surface and quantum confinement effects caused by the large surface-to-volume ratio and small size, making them dramatically different from their bulk counterparts. Superlattice nanowires have the potential to improve the performance of thermoelectronics [6-9], small sizes have lower thermal conductivity [8,9], and they can be made at a high density, thus providing improved performance. Generally, there are two major approaches in the fabrication of nanostructures: bottom-up [10] and top-down [11]. Among the various bottom-up methods, vaporliquid-solid (VLS) growth is one of the most popular and is used to grow nanostructures such as nanowires [12-14]. VLS growth uses a catalytic liquid-alloy phase that can rapidly adsorb a vapor to supersaturation levels, in which crystal growth can subsequently occur from nucleated seeds at the liquid-solid interface. It is a relatively simple method and yields a large quantity of nanowires from a single growth. However, the requirement of metal particle catalysts risks contaminating the nanowires [15], and it is not easy to control the density and nanowire size, shape, * Correspondence: [email protected] 2 University of Wisconsin-Madison, Madison, WI 53706, USA Full list of author information is available at the end of the article

and crystal orientation simultaneously [16]. Additionally, twin boundaries normally form in the VLS growth, which may affect the subsequent nanowire performance [17]. Typically, top-down approaches involve lithography, which defines the lateral size and shape of the final structure using an electron/photon-sensitive resist as mask material. Examples are electron beam lithography [18] and X-ray nanolithography [19]. For example, Zhong et al. have reported ordered SiGe/Si superlattice pillars combining holographic lithography, molecular beam epitaxy (MBE) growth, and wet chemical etching [20]. Although e-beam and X-ray lithographies create uniforml