Fault Tolerance of Memristor-Based Perceptron Network for Neural Interface
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Fault Tolerance of Memristor-Based Perceptron Network for Neural Interface Sergey Shchanikov1 Alexey Mikhaylov2
· Ilya Bordanov1 · Anton Zuev1 · Sergey Danilin1 · Dmitry Korolev2 · Alexey Belov2 ·
Accepted: 29 October 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract One of the most prospective applications of artificial neural networks based on memristors (ANNMs) is the development of more compact, fast, and efficient neural interfaces. This goal is achievable, as the results of a literature survey and our own research show. We have designed the ANNM as part of the neural interface for automatic registration and stimulation of bioelectrical activity of a living neuronal culture, but there are many challenges on the way to its hardware implementation, e.g., related to nonidealities of memristive devices, parasitic elements, the limited capabilities of OpAmps, and convertors. The listed above problems can affect the ANNM quality attributes, such as the operation accuracy, fault tolerance, and reliability, and have fundamental importance to practical operation. In this paper, we focus on the investigation of the ANNM fault tolerance and try to find single points of failure. The obtained information can be used in the ANNM reliability engineering. Keywords Memristor · Artificial neural network · Neural interface · Neuromorphic system · Design · Simulation
1 Introduction One of the most promising electronic components for the hardware implementation of artificial neural networks (ANNs) and neuromorphic systems [1] are memristors [2, 3], as confirmed by the results of analytical reviews of scientific publications and the opinions of authoritative researchers in this field [4, 5]. Currently, the R&D activities aimed at creating organic [6–9] and inorganic [10–12] materials and devices with memristive properties are conducted around the world. Memristors can be used for hardware implementation of synapses in traditional ANN architectures (such as multilayer perceptron, Hopfield network, deep networks) [13–15], in which an input signal is multiplied by a pre-programmed weight (there are synapse architectures with two [15, 16] and multiple [17] memristors), as well as synapses for spiking ANNs in which memristors exhibit synaptic plasticity mechanisms like in living biological neural networks [18–22].
Sergey Shchanikov
[email protected]
Extended author information available on the last page of the article.
According to the recent reviews [23, 24], the theory of designing, manufacturing, and operating ANNs based on memristors (ANNMs) is at the initial stage of development. The main challenges [1, 25] are the inevitable nonidealities of memristive devices (such as cycle-to-cycle and deviceto-device variations, conductance drift, and device state locking), parasitic elements (resistance and capacitance), and the limited capabilities of OpAmps and convertors (A/D and D/A). The abovementioned problems can affect the compactness, energy efficiency, speed, and reliability of systems under de
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