Formation of ultrathin CoSi 2 films using a two-step limited reaction process

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R. van Meirhaeghe and L. van Meirhaeghe Laboratorium voor Kristallografie en Studie van de Vaste Stof, Rijksuniversiteit Gent, Krijgslaan 281, B-9000 Gent, Belgium

J. Vanhellemont, B. Deweerdt, A. Lauwers, and K. Maex IMEC, Kapeldreef 75, B-3000 Leuven, Belgium (Received 28 December 1992; accepted 10 August 1993)

The formation of ultrathin (=£20 nm) and smooth CoSi2 layers on c-Si substrates has been studied by using a one- and a two-step RTP silicidation method. Pinhole-free silicide layers with a thickness down to —10-12 nm were formed on ri~, n+, and p+ crystalline Si substrates in the one-step RTP process by sputtering of Co films as thin as 4 nm and subsequent silicidation at 750 °C for 5 or 30 s. The two-step RTP silicidation method is based on the consumption of only a small fraction of a thick sputtered Co film to form Co2Si or CoSi during a first RTP step at 400-500 °C. A selective etch follows to remove the unreacted Co film. During a second, higher temperature, RTP step CoSi2 is formed. Pinhole-free and smooth CoSi2 films with a thickness down to 20 nm were formed in this way on both n+ and p+ monocrystalline Si substrates.

I. INTRODUCTION The tendency to form ultrashallow (=£0.1 fim) junctions in CMOS device processing implies that thin silicide films need to be grown.1 One of the main reasons for the reduction of the silicide thickness is to prevent junction leakage caused by stress-induced defects or lateral/vertical penetration of the junction due to the presence of the silicide layer.2 Furthermore, excessive Si consumption during the silicidation reaction may also lead to dopant depletion in the junction region near the silicide which implies a higher contact resistance.3 These factors have enlarged the efforts to better control the thickness of the silicide film and the distance between the silicide and the metallurgical junction underneath. Various approaches have been put forward to meet this goal, such as the implantation of dopants in a sputtered metal film and subsequent RTP processing to form simultaneously the shallow junction and silicide,4 or implantation in the silicide film followed by a diffusion step to form the shallow junction.5'6 The main advantage of these techniques is that the junction is conformal to the silicon/silicide interface. Silicidation of predefined junctions requires a minimization of the silicon/silicide interface roughness. Recently, the formation of extremely smooth and epitaxial CoSi2 films by silicidation of Ti-Co bimetallic layers has been reported.7'8 The application of a so-called "concurrent" silicidation process also leads to the formation of smooth silicon/silicide interfaces.9"12 This method is J. Mater. Res., Vol. 8, No. 12, Dec 1993 http://journals.cambridge.org

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based on preamorphization of the near surface region of the silicon substrate which is consumed during the subsequent Co silicidation step. An additional advantage of this technique is the small average grain size which yields a better thermal stability.13'14 Recent wo