Growth of CDTE on GaAs and Si Substrates by Organometallic Vapor Phase Epitaxy
- PDF / 1,410,782 Bytes
- 12 Pages / 414.72 x 648 pts Page_size
- 114 Downloads / 211 Views
Ishwara Bhat Electrical, Computer and Systems Engineering, Rensselaer Polytechnic Institute, Troy, New York 12180
ABSTRACT Epitaxial (100) CdTe layers have been grown by organometallic vapor phase epitaxy (OMVPE) on GaAs and Si substrates. A thin layer of CdTe was first grown by atomic layer epitaxy (ALE) on GaAs substrates followed by thicker CdTe layer by conventional organometallic vapor phase epitaxy (OMVPE). This process resulted in high quality (100) CdTe on GaAs substrates. On Si substrates, direct growth of CdTe resulted in only polycrystalline layers. Hence, a thin Ge buffer layer grown at low temperature followed by an interfacial layer of ZnTe was used to get high quality (100) CdTe on Si. The process developed here eliminates the high temperature (>850'C) deoxidation step generally required when Si substrates are used. The CdTe layers were characterized by X-ray diffraction and optical microscopy. X-ray rocking curve with full width at half maximum (FWHM) of about 260 arcsec has been obtained for a 4 um thick CdTe layer. The results presented demonstrate novel techniques to control the hetero-interfaces in order to grow high quality CdTe on GaAs and Si substrates.
INTRODUCTION HgCdTe is an important semiconductor material for the fabrication of infrared focal plane arrays operating in the 8-12um region. Epitaxial growth of this material is carried out on CdTe substrates since they are lattice matched and chemically compatible. However, in recent years, there is a considerable interest in using CdTe epitaxial layers grown on alternate substrates since bulk CdTe is not available in large area wafer form. Alternate substrates studied include sapphire, InSb, GaAs and silicon [1-4]. Out of these GaAs substrates have been studied extensively for this purpose and high quality CdTe and HgCdTe layers were grown on them [3,4]. But, Si substrate is preferable for CdTe and MCT growth since it will reduce the thermal mismatch problems encountered when a wafer with signal processing electronics is indium bump bonded to large area detector arrays as shown in figure 1. In addition, Si is available in larger area than GaAs and is less expensive. If high quality HgCdTe can be grown on CdTe/Si, then the signal processing electronics and the IR detectors can be integrated in a single wafer. In this paper, we will review the problems associated with the heteroepitaxy of CdTe on GaAs and Si and discuss the techniques used to overcome them.
213 Mat. Res. Soc. Symp. Proc. Vol. 318. ©1994 Materials Research Society
Substrate HgCdTe IR detector
Si Signal Processing Electronics
Figure 1
I
Schematic of IR detectors indium bump-bonded to signal processing electronics.
EXPERIMENTAL DETAILS
For most of the studies reported here, (100) oriented GaAs or Si substrates which are misoriented 6-90 towards (110) were used. (100) wafers without any misorientation were also used in some cases. The GaAs substrates were cleaned in organic solvents and then etched in caro's etch (H2SO 4:H20 2 :H2 0, 5:1:1 by volume) to remove a few mi
Data Loading...
