High Carrier Lifetime Bulk-Grown 4H-SiC Substrates for Power Applications
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0911-B01-03
High Carrier Lifetime Bulk-Grown 4H-SiC Substrates for Power Applications D.P. Malta1, J.R. Jenny1, V.F. Tsvetkov1, M. Das1, St. G. Müller1, H. McD. Hobgood1, C.H. Carter, Jr. 1, R.J. Kumar2, J.M. Borrego2, and R.J. Gutmann2 1 Cree, Inc., 4600 Silicon Drive, Durham, NC, 27703 2 Rensselaer Polytechnic Institute, 110 8th St., Troy, NY, 12180
ABSTRACT A thermal anneal process has been developed that significantly enhances minority carrier lifetime (MCL) in bulk-grown substrates. Microwave photoconductivity decay (MPCD) measurements on bulk grown substrates subjected to this process have exhibited decay times in excess of 35 µs. Electron Beam Induced Current (EBIC) measurements indicated a minority carrier diffusion length (MCDL) of 65 µm resulting in a calculated MCL of 15 µs, well within the range of that measured by MPCD. Deep level transient spectroscopic (DLTS) analysis of samples subjected to this anneal process indicated that a significant reduction of deep level defects, particularly Z1/2, may account for the significantly enhanced lifetimes. The enhanced lifetime is coincident with a transformation of the original as-grown crystal into a strained or disordered lattice configuration as a result of the high temperature anneal process. PiN diodes were fabricated employing 350 µm thick bulk-grown substrates as the intrinsic drift region and thin p- and n-type epitaxial layers on either face of the substrate to act as the anode and cathode, respectively. Conductivity modulation was achieved in these diodes with a 10x effective carrier concentration increase over the background doping as extracted from the differential onresistance. Significant stacking fault generation observed during forward operation served as additional evidence of conductivity modulation and underscores the importance of reducing dislocation densities in substrates in order to produce a viable bulk-grown drift layer. INTRODUCTION High power (>10 kV) bipolar SiC devices require thick (>100 µm), low-doped homo-epitaxial SiC layers with minority carrier lifetimes in the microsecond range [1]. Such layers are difficult and, therefore, costly to manufacture relative to the substrates on which they are grown due to stringent requirements on quality, thickness and uniformity. In this study, we explore the feasibility, from a recombination lifetime perspective, of employing a high purity bulk-grown SiC substrate as the active region for high voltage devices, eliminating the need for thick epitaxial layers. Previous studies have shown that recombination lifetimes in bulk-grown substrates are orders of magnitude below the 2 µs required to fabricate a viable 10 kV PiN diode [2,3]. The main recombination mechanism for these devices is caused by the presence of deep level defects present in the drift layer. In other semiconductor systems, both intrinsic and extrinsic defects have been shown to act as lifetime-killers [4]. In this work, we address these two sources of recombination centers in SiC by: 1) utilizing high purity bulk grown SiC subst
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