High-voltage normally OFF GaN power transistors on SiC and Si substrates
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roduction High-voltage gallium nitride (GaN)-based power switching transistors enable efficient power converters with increased power density. High converter switching frequencies can be realized with lateral GaN-based heterostructure field-effect transistors (HFETs) due to the low area-specific ON-state resistance for a given maximum voltage than can be applied to the transistor in the OFF-state (blocking voltage) and the low-gate charge required for switching. GaN-HFET technology is also considered to be cost-efficient since devices can be manufactured on six-inch (150-mm) and eight-inch (200-mm) Si substrates using existing complementary metal oxide semiconductor (CMOS)-fabrication processing.1,2 While radio frequency GaN HFETs on SiC substrates are considered mature, power switching applications are migrating to GaN-on-Si due to reasons of substrate costs and diameters, as well as compatibility with existing Si-device production lines.
However, the lattice mismatch and thermal expansion coefficient mismatch between Si and GaN are larger than those between SiC and GaN. Growing high-quality GaN layers on Si substrates is therefore quite a challenge.3 Differences in substrate electrical and thermal conductivities may also impact device performance. Lateral GaN-HEMTs use a highly conductive thin electron layer established at the heterojunction between the GaNbuffer layer and the AlGaN-barrier layer as the transistor channel (inset of Figure 1) known as a two-dimensional electron gas (2DEG). These devices have intrinsic normally ON properties since the transistor gate needs to be negatively biased to deplete the transistor channel. However, a normally OFF characteristic is required for power electronics applications due to inherent safety concerns. Only then can unwanted power flow be suppressed in the case where there is no control voltage on the transistor gate. The realization of robust normally OFF
Oliver Hilt, Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Germany; [email protected] Eldad Bahat-Treidel, Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Germany; [email protected] Arne Knauer, Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Germany; [email protected] Frank Brunner, Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Germany; [email protected] Rimma Zhytnytska, Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Germany; [email protected] Joachim Würfl, Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Germany; joachim.wuerfl@fbh-berlin.de DOI: 10.1557/mrs.2015.88
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MRS BULLETIN • VOLUME 40 • MAY 2015 • www.mrs.org/bulletin
© 2015 Materials Research Society
HIGH-VOLTAGE NORMALLY OFF GAN POWER TRANSISTORS ON SIC AND SI SUBSTRATES
Figure 1. Simulated band diagram at the gate position of a p-GaN gate Al0.23Ga0.77N/GaN heterostructure field-effect transistor for different buffer compositions: unintentionally doped (uid) GaN buffe
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