Inductively Coupled High-Density Plasma-Induced Etch Damage of GaN MESFETs

  • PDF / 97,589 Bytes
  • 7 Pages / 612 x 792 pts (letter) Page_size
  • 77 Downloads / 210 Views

DOWNLOAD

REPORT


Inductively Coupled High-Density Plasma-Induced Etch Damage of GaN MESFETs R. J. Shul,* L. Zhang,* A. G. Baca,* C. G. Willison,* J. Han,* S. J. Pearton,** K. P. Lee,** and F. Ren*** *

Sandia National Laboratories, Albuquerque, NM 87185-0603, [email protected] University of Florida, Department of Materials Science and Engineering, Gainesville, FL 32611 ** University of Florida, Department of Chemical Engineering, Gainesville, FL 32611

**

ABSTRACT The fabrication of a wide variety of GaN-based photonic and electronic devices depends on dry etching, which typically requires ion-assisted removal of the substrate material. Under conditions of both high plasma flux and energetic ion bombardment, GaN etch rates greater than 0.5 µm/min and anisotropic etch profiles are readily achieved in Inductively Coupled Plasma (ICP) etch systems. Unfortunately, under these conditions plasma-induced damage often occurs. Attempts to minimize such damage by reducing the ion energy or increasing the chemical activity in the plasma often result in a loss of etch rate or profile control which can limit dimensional control and reduce the utility of the process for device applications requiring anisotropic etch profiles. It is therefore necessary to develop plasma etch processes which couple anisotropy for critical dimension and sidewall profile control and high etch rates with low-damage for optimum device performance. In this study we report changes in source resistance, reverse breakdown voltage, transconductance, and drain saturation current for GaN MESFET structures exposed to an Ar ICP plasma. In general, device performance was sensitive to ion bombardment energy and ion flux.

INTRODUCTION The recent interest in the fabrication of high power/high temperature GaN devices(1-6) has generated awareness of the need for well-controlled, anisotropic, low-damage etch processes. Plasma etch requirements for electronic devices are much more demanding than those for photonic devices. For most photonic devices, the etch terminates on a relatively thick contact layer which is somewhat resistant to plasma damage. However, many electronic devices require well-controlled, shallow etching on the order of a few hundred angstroms. Furthermore, the active regions of electronic devices are often shallow thus requiring low damage processes to ensure optimum device performance. For example, the fabrication of heterojunction bipolar transistors (HBTs) requires low-damage etch processes for the formation of mesa structures for base and collector contacts to minimize recombination in the base-emitter junction and surface leakage in the base-collector junction. Although many etch processes for the group-III nitrides with etch rates > 0.5 µm/min and anisotropic profiles have been reported, they typically occur under high ion bombardment and high plasma flux conditions. Unfortunately, under these conditions significant damage to the

T7.5.1

device can occur. It has been reported that under energetic ion bombardment conditions, surface damage as deep as 1000 Å